44 lines
1.1 KiB
Systemverilog
44 lines
1.1 KiB
Systemverilog
// Copyright © 2019-2023
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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`include "VX_define.vh"
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interface VX_mem_perf_if import VX_gpu_pkg::*; ();
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cache_perf_t icache;
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cache_perf_t dcache;
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cache_perf_t l2cache;
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cache_perf_t l3cache;
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cache_perf_t smem;
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mem_perf_t mem;
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modport master (
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output icache,
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output dcache,
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output l2cache,
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output l3cache,
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output smem,
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output mem
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);
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modport slave (
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input icache,
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input dcache,
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input l2cache,
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input l3cache,
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input smem,
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input mem
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);
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endinterface
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