27 lines
561 B
Verilog
27 lines
561 B
Verilog
`ifndef VX_GPR_READ_IF
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`define VX_GPR_READ_IF
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`include "VX_define.vh"
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interface VX_gpr_read_if ();
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wire valid;
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wire [`NW_BITS-1:0] warp_num;
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wire [`NR_BITS-1:0] rs1;
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wire [`NR_BITS-1:0] rs2;
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wire [`NR_BITS-1:0] rs3;
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wire use_rs3;
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wire [`NUM_THREADS-1:0][31:0] rs1_data;
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wire [`NUM_THREADS-1:0][31:0] rs2_data;
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wire [`NUM_THREADS-1:0][31:0] rs3_data;
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wire in_ready;
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wire out_ready;
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endinterface
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`endif |