Blaise Tine b7a724410b update DRAM simulation - reduce the latency of duplicate requests (simulate DRAM cache)

2020-12-03 07:30:19 -08:00

..

configs

project directories reorganization

2020-04-14 06:35:20 -04:00

models/memory

RTL code refactoring

2020-04-19 03:38:00 -04:00

modelsim

yosys synthesis refactoring

2020-07-10 18:56:41 -04:00

old_rtl

refactoring fixes

2020-04-14 19:39:59 -04:00

opae

adding stream arbiter

2020-12-03 06:40:23 -08:00

rtl

update DRAM simulation - reduce the latency of duplicate requests (simulate DRAM cache)

2020-12-03 07:30:19 -08:00

scripts

shared memory optimization

2020-11-29 15:04:31 -08:00

simulate

update DRAM simulation - reduce the latency of duplicate requests (simulate DRAM cache)

2020-12-03 07:30:19 -08:00

syn

using mshr pending request size

2020-12-01 00:54:25 -08:00

unit_tests

rename MSRQ to MSHR

2020-11-28 17:32:00 -05:00

.gitignore

adding dram writeenable support + scheduler bug fixes

2020-05-27 19:00:23 -04:00

Makefile

scope refactoring

2020-10-03 18:53:21 -04:00