Files
kernels/hw/rtl/interfaces/VX_dcache_response_inter.v
2020-04-19 03:38:00 -04:00

13 lines
229 B
Verilog

`ifndef VX_DCACHE_RSP
`define VX_DCACHE_RSP
`include "../VX_define.vh"
interface VX_dcache_response_inter ();
wire [`NUM_THREADS-1:0][31:0] in_cache_driver_out_data;
wire delay;
endinterface
`endif