435 lines
10 KiB
C++
435 lines
10 KiB
C++
#include <fstream>
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#include <iostream>
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#include <iomanip>
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#include <string>
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#include <vector>
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#include <algorithm>
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#include <stdlib.h>
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#include <assert.h>
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#include "debug.h"
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#include "types.h"
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#include "util.h"
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#include "mem.h"
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#include "core.h"
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using namespace vortex;
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RamMemDevice::RamMemDevice(const char *filename, Size wordSize)
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: wordSize_(wordSize) {
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std::ifstream input(filename);
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if (!input) {
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std::cout << "Error reading file \"" << filename << "\" into RamMemDevice.\n";
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std::abort();
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}
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do {
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contents_.push_back(input.get());
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} while (input);
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while (contents_.size() % wordSize)
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contents_.push_back(0x00);
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}
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RamMemDevice::RamMemDevice(Size size, Size wordSize)
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: wordSize_(wordSize)
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, contents_(size)
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{}
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void RomMemDevice::write(Addr, Word) {
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std::cout << "Attempt to write to ROM.\n";
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std::abort();
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}
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Word RamMemDevice::read(Addr addr) {
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D(2, "RAM read, addr=0x" << std::hex << addr);
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Word w = readWord(contents_, addr, wordSize_ - addr % wordSize_);
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return w;
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}
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void RamMemDevice::write(Addr addr, Word w) {
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D(2, "RAM write, addr=0x" << std::hex << addr);
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writeWord(contents_, addr, wordSize_ - addr % wordSize_, w);
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}
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///////////////////////////////////////////////////////////////////////////////
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bool MemoryUnit::ADecoder::lookup(Addr a, Size wordSize, mem_accessor_t* ma) {
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Addr e = a + (wordSize - 1);
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assert(e >= a);
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for (auto iter = entries_.rbegin(), iterE = entries_.rend(); iter != iterE; ++iter) {
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if (a >= iter->start && e <= iter->end) {
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ma->md = iter->md;
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ma->addr = a - iter->start;
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return true;
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}
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}
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return false;
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}
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void MemoryUnit::ADecoder::map(Addr a, Addr e, MemDevice &m) {
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assert(e >= a);
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entry_t entry{&m, a, e};
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entries_.emplace_back(entry);
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}
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Word MemoryUnit::ADecoder::read(Addr a, bool /*sup*/, Size wordSize) {
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mem_accessor_t ma;
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if (!this->lookup(a, wordSize, &ma)) {
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std::cout << "lookup of 0x" << std::hex << a << " failed.\n";
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throw BadAddress();
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}
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return ma.md->read(ma.addr);
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}
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void MemoryUnit::ADecoder::write(Addr a, Word w, bool /*sup*/, Size wordSize) {
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mem_accessor_t ma;
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if (!this->lookup(a, wordSize, &ma)) {
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std::cout << "lookup of 0x" << std::hex << a << " failed.\n";
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throw BadAddress();
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}
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RAM *ram = (RAM *)ma.md;
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if (wordSize == 8) {
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ram->writeByte(ma.addr, &w);
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} else if (wordSize == 16) {
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ram->writeHalf(ma.addr, &w);
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} else {
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ram->writeWord(ma.addr, &w);
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}
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}
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///////////////////////////////////////////////////////////////////////////////
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MemoryUnit::MemoryUnit(Size pageSize, Size addrBytes, bool disableVm)
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: pageSize_(pageSize)
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, addrBytes_(addrBytes)
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, disableVm_(disableVm) {
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if (!disableVm) {
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tlb_[0] = TLBEntry(0, 077);
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}
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}
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void MemoryUnit::attach(MemDevice &m, Addr start, Addr end) {
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decoder_.map(start, end, m);
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}
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MemoryUnit::TLBEntry MemoryUnit::tlbLookup(Addr vAddr, Word flagMask) {
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auto iter = tlb_.find(vAddr / pageSize_);
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if (iter != tlb_.end()) {
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if (iter->second.flags & flagMask)
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return iter->second;
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else {
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D(2, "Page fault on addr 0x" << std::hex << vAddr << "(bad flags)");
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throw PageFault(vAddr, false);
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}
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} else {
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D(2, "Page fault on addr 0x" << std::hex << vAddr << "(not in TLB)");
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throw PageFault(vAddr, true);
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}
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}
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Word MemoryUnit::read(Addr vAddr, bool sup) {
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Addr pAddr;
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if (disableVm_) {
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pAddr = vAddr;
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} else {
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Word flagMask = sup ? 8 : 1;
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TLBEntry t = this->tlbLookup(vAddr, flagMask);
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pAddr = t.pfn * pageSize_ + vAddr % pageSize_;
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}
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return decoder_.read(pAddr, sup, addrBytes_);
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}
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Word MemoryUnit::fetch(Addr vAddr, bool sup) {
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Addr pAddr;
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if (disableVm_) {
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pAddr = vAddr;
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} else {
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Word flagMask = sup ? 32 : 4;
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TLBEntry t = this->tlbLookup(vAddr, flagMask);
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pAddr = t.pfn * pageSize_ + vAddr % pageSize_;
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}
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Word instruction = decoder_.read(pAddr, sup, addrBytes_);
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return instruction;
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}
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void MemoryUnit::write(Addr vAddr, Word w, bool sup, Size bytes) {
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Addr pAddr;
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if (disableVm_) {
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pAddr = vAddr;
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} else {
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Word flagMask = sup ? 16 : 2;
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TLBEntry t = tlbLookup(vAddr, flagMask);
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pAddr = t.pfn * pageSize_ + vAddr % pageSize_;
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}
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decoder_.write(pAddr, w, sup, bytes);
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}
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void MemoryUnit::tlbAdd(Addr virt, Addr phys, Word flags) {
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D(1, "tlbAdd(0x" << std::hex << virt << ", 0x" << phys << ", 0x" << flags << ')');
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tlb_[virt / pageSize_] = TLBEntry(phys / pageSize_, flags);
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}
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void MemoryUnit::tlbRm(Addr va) {
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if (tlb_.find(va / pageSize_) != tlb_.end())
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tlb_.erase(tlb_.find(va / pageSize_));
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}
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void *vortex::consoleInputThread(void * /*arg_vp*/) {
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//--
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return nullptr;
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}
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///////////////////////////////////////////////////////////////////////////////
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DiskControllerMemDevice::DiskControllerMemDevice(Size wordSize, Size blockSize, Core &c)
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: wordSize_(wordSize)
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, blockSize_(blockSize)
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, core_(c)
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{}
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Word DiskControllerMemDevice::read(Addr a) {
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switch (a / 8) {
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case 0:
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return curDisk_;
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case 1:
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return curBlock_;
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case 2:
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return disks_[curDisk_].blocks * blockSize_;
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case 3:
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return physAddr_;
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case 4:
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return command_;
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case 5:
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return status_;
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default:
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std::cout << "Attempt to read invalid disk controller register.\n";
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std::abort();
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}
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}
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void DiskControllerMemDevice::write(Addr a, Word w) {
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switch (a / 8) {
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case 0:
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if (w <= disks_.size()) {
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curDisk_ = w;
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status_ = OK;
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} else {
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status_ = INVALID_DISK;
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}
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break;
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case 1:
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if (w < disks_[curDisk_].blocks) {
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curBlock_ = w;
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} else {
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status_ = INVALID_BLOCK;
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}
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break;
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case 2:
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nBlocks_ = w >= disks_[curDisk_].blocks ? disks_[curDisk_].blocks - 1 : w;
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status_ = OK;
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break;
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case 3:
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physAddr_ = w;
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status_ = OK;
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break;
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case 4:
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std::cout << "TODO: Implement disk read and write!\n";
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break;
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}
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}
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///////////////////////////////////////////////////////////////////////////////
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RAM::RAM(uint32_t num_pages, uint32_t page_size)
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: page_bits_(log2ceil(page_size)) {
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assert(page_size >= 4);
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assert(ispow2(page_size));
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mem_.resize(num_pages, NULL);
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uint64_t sizel = uint64_t(mem_.size()) << page_bits_;
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size_ = (sizel <= 0xFFFFFFFF) ? sizel : 0xffffffff;
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}
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RAM::~RAM() {
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for (auto& page : mem_) {
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delete[] page;
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}
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}
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void RAM::clear() {
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for (auto& page : mem_) {
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delete[] page;
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page = NULL;
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}
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}
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Size RAM::size() const {
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return size_;
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}
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uint8_t *RAM::get(uint32_t address) {
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uint32_t page_size = 14 << page_bits_;
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uint32_t page_index = address >> page_bits_;
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uint32_t byte_offset = address & ((1 << page_bits_) - 1);
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uint8_t* &page = mem_.at(page_index);
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if (page == NULL) {
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uint8_t *ptr = new uint8_t[page_size];
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for (uint32_t i = 0; i < (page_size / 4); ++i) {
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((uint32_t*)ptr)[i] = 0xddccbbaa;
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}
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page = ptr;
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}
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return page + byte_offset;
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}
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void RAM::read(uint32_t address, uint32_t length, uint8_t *data) {
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for (unsigned i = 0; i < length; i++) {
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data[i] = *this->get(address + i);
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}
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}
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void RAM::write(uint32_t address, uint32_t length, uint8_t *data) {
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for (unsigned i = 0; i < length; i++) {
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*this->get(address + i) = data[i];
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}
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}
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Byte *RAM::base() {
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return (Byte *)this->get(0);
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}
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void RAM::getBlock(uint32_t address, uint8_t *data) {
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uint32_t block_number = address & 0xffffff00; // To zero out block offset
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uint32_t bytes_num = 256;
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this->read(block_number, bytes_num, data);
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}
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void RAM::getWord(uint32_t address, uint32_t *data) {
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data[0] = 0;
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uint8_t first = *get(address + 0);
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uint8_t second = *get(address + 1);
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uint8_t third = *get(address + 2);
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uint8_t fourth = *get(address + 3);
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data[0] = (data[0] << 0) | fourth;
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data[0] = (data[0] << 8) | third;
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data[0] = (data[0] << 8) | second;
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data[0] = (data[0] << 8) | first;
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}
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void RAM::writeWord(uint32_t address, uint32_t *data) {
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uint32_t data_to_write = *data;
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uint32_t byte_mask = 0xFF;
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for (int i = 0; i < 4; i++) {
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*this->get(address + i) = data_to_write & byte_mask;
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data_to_write = data_to_write >> 8;
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}
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}
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void RAM::writeHalf(uint32_t address, uint32_t *data) {
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uint32_t data_to_write = *data;
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uint32_t byte_mask = 0xFF;
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for (int i = 0; i < 2; i++) {
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*this->get(address + i) = data_to_write & byte_mask;
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data_to_write = data_to_write >> 8;
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}
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}
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void RAM::writeByte(uint32_t address, uint32_t *data) {
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uint32_t data_to_write = *data;
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uint32_t byte_mask = 0xFF;
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*this->get(address) = data_to_write & byte_mask;
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data_to_write = data_to_write >> 8;
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}
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void RAM::write(Addr addr, Word w) {
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uint32_t word = (uint32_t)w;
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writeWord(addr, &word);
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}
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Word RAM::read(Addr addr) {
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uint32_t w;
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getWord(addr, &w);
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return (Word)w;
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}
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static uint32_t hti_old(char c) {
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if (c >= 'A' && c <= 'F')
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return c - 'A' + 10;
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if (c >= 'a' && c <= 'f')
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return c - 'a' + 10;
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return c - '0';
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}
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static uint32_t hToI_old(char *c, uint32_t size) {
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uint32_t value = 0;
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for (uint32_t i = 0; i < size; i++) {
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value += hti_old(c[i]) << ((size - i - 1) * 4);
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}
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return value;
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}
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void RAM::loadHexImage(std::string path) {
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this->clear();
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FILE *fp = fopen(&path[0], "r");
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if (fp == 0) {
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std::cout << path << " not found" << std::endl;
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}
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fseek(fp, 0, SEEK_END);
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uint32_t size = ftell(fp);
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fseek(fp, 0, SEEK_SET);
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char *content = new char[size];
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int x = fread(content, 1, size, fp);
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if (!x) {
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std::cout << "COULD NOT READ FILE\n";
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std::abort();
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}
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int offset = 0;
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char *line = content;
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while (1) {
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if (line[0] == ':') {
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uint32_t byteCount = hToI_old(line + 1, 2);
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uint32_t nextAddr = hToI_old(line + 3, 4) + offset;
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uint32_t key = hToI_old(line + 7, 2);
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switch (key) {
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case 0:
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for (uint32_t i = 0; i < byteCount; i++) {
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unsigned add = nextAddr + i;
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*this->get(add) = hToI_old(line + 9 + i * 2, 2);
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}
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break;
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case 2:
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offset = hToI_old(line + 9, 4) << 4;
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break;
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case 4:
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offset = hToI_old(line + 9, 4) << 16;
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break;
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default:
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break;
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}
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}
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while (*line != '\n' && size != 0) {
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line++;
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size--;
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}
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if (size <= 1)
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break;
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line++;
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size--;
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}
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if (content)
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delete[] content;
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} |