43 lines
4.8 KiB
Plaintext
43 lines
4.8 KiB
Plaintext
# DESCRIPTION: Verilator output: Timestamp data for --skip-identical. Delete at will.
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C "--compiler gcc -cc cache_simX.v -I. -I../rtl/shared_memory -I../rtl/cache -I../rtl/interfaces -Isimulate -I../rtl --exe simX.cpp args.cpp mem.cpp core.cpp instruction.cpp enc.cpp util.cpp -CFLAGS -std=c++11 -fPIC -O3 -Wno-UNOPTFLAT -Wno-WIDTH --trace -DVL_DEBUG=1"
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S 283 10696049115265660 1574383273 224134400 1574383273 224134400 "../rtl/VX_countones.v"
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S 7236 5066549581052550 1574383273 231079500 1574383273 231079500 "../rtl/VX_define.v"
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S 8325 2251799813945994 1574383273 232119600 1574383273 232119600 "../rtl/VX_dmem_controller.v"
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S 517 3096224744077973 1574383273 236061300 1574383273 236061300 "../rtl/VX_generic_priority_encoder.v"
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S 683 2814749767367343 1574383273 260714600 1574383273 260714600 "../rtl/VX_priority_encoder_w_mask.v"
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S 8590 10977524091976397 1574383273 267695600 1574383273 267695600 "../rtl/cache/VX_Cache_Bank.v"
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S 748 10977524091976401 1574383273 277789900 1574383273 277789900 "../rtl/cache/VX_cache_bank_valid.v"
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S 7349 9851624185133791 1574383273 278740700 1574383273 278740700 "../rtl/cache/VX_cache_data.v"
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S 6476 34058472182250218 1574383273 279715700 1574383273 279715700 "../rtl/cache/VX_cache_data_per_index.v"
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S 14456 13229323905661682 1574383273 279715700 1574383273 279715700 "../rtl/cache/VX_d_cache.v"
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S 393 5910974511184689 1574383273 301972800 1574383273 301972800 "../rtl/interfaces/VX_dcache_request_inter.v"
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S 215 2814749767367474 1574383273 302974100 1574383273 302974100 "../rtl/interfaces/VX_dcache_response_inter.v"
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S 870 8725724278291251 1574383273 304006100 1574383273 304006100 "../rtl/interfaces/VX_dram_req_rsp_inter.v"
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S 354 6192449487895387 1574383273 313939400 1574383273 313939400 "../rtl/interfaces/VX_icache_request_inter.v"
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S 212 27021597764483932 1574383273 313939400 1574383273 313939400 "../rtl/interfaces/VX_icache_response_inter.v"
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S 7236 5066549581052550 1574383273 231079500 1574383273 231079500 "../rtl/shared_memory/../VX_define.v"
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S 676 3940649674211014 1574383273 400242000 1574383273 400242000 "../rtl/shared_memory/VX_bank_valids.v"
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S 3038 3096224744079047 1574383273 411240400 1574383273 411240400 "../rtl/shared_memory/VX_priority_encoder_sm.v"
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S 4962 3096224744079048 1574383273 412279700 1574383273 412279700 "../rtl/shared_memory/VX_shared_memory.v"
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S 3207 3940649674211020 1574383273 412279700 1574383273 412279700 "../rtl/shared_memory/VX_shared_memory_block.v"
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S 5629640 281474978453844 1574044016 334922400 1574044016 333963200 "/usr/local/bin/verilator_bin"
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S 3144 1407374883818566 1574383274 742155300 1574383274 742155300 "cache_simX.v"
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T 751758 20547673300142630 1574427193 757744700 1574427193 757744700 "obj_dir/Vcache_simX.cpp"
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T 31623 7599824371327898 1574427193 691983400 1574427193 691983400 "obj_dir/Vcache_simX.h"
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T 2380 7318349394745968 1574427193 846458800 1574427193 846458800 "obj_dir/Vcache_simX.mk"
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T 769517 4785074604350062 1574427193 841470700 1574427193 841470700 "obj_dir/Vcache_simX_VX_Cache_Bank__pi7.cpp"
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T 24956 5629499534482029 1574427193 770660800 1574427193 770660800 "obj_dir/Vcache_simX_VX_Cache_Bank__pi7.h"
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T 1012 5066549581060716 1574427193 766841100 1574427193 766841100 "obj_dir/Vcache_simX_VX_dcache_request_inter.cpp"
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T 1356 4785074604350059 1574427193 765276000 1574427193 765276000 "obj_dir/Vcache_simX_VX_dcache_request_inter.h"
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T 987 5348024557771370 1574427193 763679100 1574427193 763679100 "obj_dir/Vcache_simX_VX_dram_req_rsp_inter__N1_NB4.cpp"
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T 1333 5910974511192681 1574427193 761684400 1574427193 761684400 "obj_dir/Vcache_simX_VX_dram_req_rsp_inter__N1_NB4.h"
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T 987 9288674231720551 1574427193 760896800 1574427193 760896800 "obj_dir/Vcache_simX_VX_dram_req_rsp_inter__N4_NB4.cpp"
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T 1334 20829148276857269 1574427193 759408000 1574427193 759408000 "obj_dir/Vcache_simX_VX_dram_req_rsp_inter__N4_NB4.h"
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T 3838 54606145481948840 1574427193 527314200 1574427193 527314200 "obj_dir/Vcache_simX__Syms.cpp"
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T 1968 41939771530004893 1574427193 528311300 1574427193 528311300 "obj_dir/Vcache_simX__Syms.h"
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T 762929 82472168176354735 1574427193 687881900 1574427193 687881900 "obj_dir/Vcache_simX__Trace.cpp"
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T 990142 253046004063004355 1574427193 619067200 1574427193 619067200 "obj_dir/Vcache_simX__Trace__Slow.cpp"
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T 1444 8444249301588593 1574427193 847454700 1574427193 847454700 "obj_dir/Vcache_simX__ver.d"
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T 0 0 1574427193 858425500 1574427193 858425500 "obj_dir/Vcache_simX__verFiles.dat"
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T 1489 13792273859091055 1574427193 843885600 1574427193 843885600 "obj_dir/Vcache_simX_classes.mk"
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