c1e168fdbe
+ Microarchitecture optimizations + 64-bit support + Xilinx FPGA support + LLVM-16 support + Refactoring and quality control fixes minor update minor update minor update minor update minor update minor update cleanup cleanup cache bindings and memory perf refactory minor update minor update hw unit tests fixes minor update minor update minor update minor update minor update minor udpate minor update minor update minor update minor update minor update minor update minor update minor updates minor updates minor update minor update minor update minor update minor update minor update minor updates minor updates minor updates minor updates minor update minor update
100 lines
2.4 KiB
Makefile
100 lines
2.4 KiB
Makefile
RTL_DIR = ../../../../../rtl
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AFU_DIR = $(RTL_DIR)/afu/opae
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THIRD_PARTY_DIR = ../../../../../../third_party
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IP_CACHE_DIR = ../../../ip_cache/$(DEVICE_FAMILY)
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SCRIPT_DIR = ../../../../../scripts
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THIRD_PARTY_DIR = ../../../../../../third_party
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ifeq ($(DEVICE_FAMILY), stratix10)
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FAMILY = "Stratix 10"
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DEVICE = 1SX280HN2F43E2VG
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endif
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ifeq ($(DEVICE_FAMILY), arria10)
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FAMILY = "Arria 10"
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DEVICE = 10AX115N3F40E2SG
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endif
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CONFIGS += -DNDEBUG
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CONFIGS += -DQUARTUS
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CONFIGS += -DSYNTHESIS
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CONFIGS += -DNOGLOBALS
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PROJECT_FILES = $(PROJECT).qpf $(PROJECT).qsf
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# Executable Configuration
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SYN_ARGS = --parallel --read_settings_files=on
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FIT_ARGS = --parallel --part=$(DEVICE) --read_settings_files=on
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ASM_ARGS =
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STA_ARGS = --parallel --do_report_timing
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POW_ARGS = --no_input_file --default_input_io_toggle_rate=60% --default_toggle_rate=20% --use_vectorless_estimation=off
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# Build targets
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all: gen-sources $(PROJECT).sta.rpt $(PROJECT).pow.rpt
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gen-sources: src
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src:
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mkdir -p src
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$(SCRIPT_DIR)/gen_sources.sh $(CONFIGS) $(RTL_INCLUDE) -P -Csrc
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syn: $(PROJECT).syn.rpt
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fit: $(PROJECT).fit.rpt
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asm: $(PROJECT).asm.rpt
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sta: $(PROJECT).sta.rpt
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pow: $(PROJECT).pow.rpt
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smart: smart.log
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# Target implementations
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STAMP = echo done >
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$(PROJECT).syn.rpt: smart.log syn.chg
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quartus_syn $(SYN_ARGS) $(PROJECT)
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$(STAMP) fit.chg
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$(PROJECT).fit.rpt: smart.log fit.chg $(PROJECT).syn.rpt
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quartus_fit $(FIT_ARGS) $(PROJECT)
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$(STAMP) asm.chg
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$(STAMP) sta.chg
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$(PROJECT).asm.rpt: smart.log asm.chg $(PROJECT).fit.rpt
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quartus_asm $(ASM_ARGS) $(PROJECT)
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$(STAMP) pow.chg
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$(PROJECT).sta.rpt: smart.log sta.chg $(PROJECT).fit.rpt
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quartus_sta $(STA_ARGS) $(PROJECT)
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$(PROJECT).pow.rpt: smart.log pow.chg $(PROJECT).asm.rpt
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quartus_pow $(POW_ARGS) $(PROJECT)
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smart.log: $(PROJECT_FILES)
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quartus_sh --determine_smart_action $(PROJECT) > smart.log
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# Project initialization
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$(PROJECT_FILES): gen-sources
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quartus_sh -t ../../project.tcl -project $(PROJECT) -family $(FAMILY) -device $(DEVICE) -top $(TOP_LEVEL_ENTITY) -src "$(SRC_FILE)" -sdc ../../project.sdc -inc "src"
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syn.chg:
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$(STAMP) syn.chg
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fit.chg:
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$(STAMP) fit.chg
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sta.chg:
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$(STAMP) sta.chg
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asm.chg:
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$(STAMP) asm.chg
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pow.chg:
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$(STAMP) pow.chg
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program: $(PROJECT).sof
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quartus_pgm --no_banner --mode=jtag -o "$(PROJECT).sof"
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clean:
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rm -rf src bin *.rpt *.chg *.qsf *.qpf *.qws *.log *.htm *.eqn *.pin *.sof *.pof qdb incremental_db tmp-clearbox
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