15 lines
159 B
Verilog
15 lines
159 B
Verilog
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`include "../VX_define.v"
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`ifndef VX_ICACHE_REQ
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`define VX_ICACHE_REQ
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interface VX_icache_request_inter ();
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wire[31:0] pc_address;
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endinterface
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`endif |