+ Microarchitecture optimizations + 64-bit support + Xilinx FPGA support + LLVM-16 support + Refactoring and quality control fixes
9 lines
230 B
INI
9 lines
230 B
INI
[connectivity]
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#nk=vortex_afu:1
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#sp=vortex_afu_1.m_axi_mem_0:HBM[0:15]
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[vivado]
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#prop=fileset.sim_1.xsim.elaborate.debug_level=all
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[advanced]
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#param=compiler.userPostDebugProfileOverlayTcl=../scripts/post_dbg_profile_overlay.tcl |