Files
kernels/hw/rtl/interfaces/VX_jal_response_inter.v
2020-04-16 10:40:40 -04:00

15 lines
213 B
Verilog

`ifndef VX_JAL_RSP
`define VX_JAL_RSP
`include "../VX_define.vh"
interface VX_jal_response_inter ();
wire jal;
wire[31:0] jal_dest;
wire[`NW_BITS-1:0] jal_warp_num;
endinterface
`endif