18 lines
227 B
Verilog
18 lines
227 B
Verilog
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`include "../VX_define.v"
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`ifndef VX_BRANCH_RSP
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`define VX_BRANCH_RSP
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interface VX_branch_response_inter ();
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wire branch_dir;
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wire[31:0] branch_dest;
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wire[`NW_M1:0] branch_warp_num;
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endinterface
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`endif |