201 lines
5.4 KiB
Makefile
201 lines
5.4 KiB
Makefile
DEVICE_FAMILY ?= arria10
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ASE_BUILD_DIR ?= build_ase_$(DEVICE_FAMILY)
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FPGA_BUILD_DIR ?= build_fpga_$(DEVICE_FAMILY)
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RTL_DIR=../../rtl
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ifeq ($(shell which qsub-synth),)
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RUN_SYNTH=$(OPAE_PLATFORM_ROOT)/bin/run.sh > build.log 2>&1 &
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else
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RUN_SYNTH=qsub-synth
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endif
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# control RTL debug print states
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DBG_PRINT_FLAGS += -DDBG_PRINT_PIPELINE
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DBG_PRINT_FLAGS += -DDBG_PRINT_CORE_ICACHE
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DBG_PRINT_FLAGS += -DDBG_PRINT_CORE_DCACHE
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DBG_PRINT_FLAGS += -DDBG_PRINT_CACHE_BANK
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DBG_PRINT_FLAGS += -DDBG_PRINT_CACHE_MSHR
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DBG_PRINT_FLAGS += -DDBG_PRINT_CACHE_TAG
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DBG_PRINT_FLAGS += -DDBG_PRINT_CACHE_DATA
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DBG_PRINT_FLAGS += -DDBG_PRINT_MEM
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DBG_PRINT_FLAGS += -DDBG_PRINT_OPAE
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DBG_PRINT_FLAGS += -DDBG_PRINT_AVS
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DBG_PRINT_FLAGS += -DDBG_PRINT_SCOPE
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DBG_FLAGS += $(DBG_PRINT_FLAGS)
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DBG_FLAGS += -DDBG_CACHE_REQ_INFO
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CONFIG1 := -DNUM_CLUSTERS=1 -DNUM_CORES=1 -DL2_ENABLE=0 -DL3_ENABLE=0 $(CONFIGS)
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CONFIG2 := -DNUM_CLUSTERS=1 -DNUM_CORES=2 -DL2_ENABLE=0 -DL3_ENABLE=0 $(CONFIGS)
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CONFIG4 := -DNUM_CLUSTERS=1 -DNUM_CORES=4 -DL2_ENABLE=0 -DL3_ENABLE=0 $(CONFIGS)
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CONFIG8 := -DNUM_CLUSTERS=2 -DNUM_CORES=4 -DL2_ENABLE=0 -DL3_ENABLE=0 $(CONFIGS)
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CONFIG16 := -DNUM_CLUSTERS=4 -DNUM_CORES=4 -DL2_ENABLE=0 -DL3_ENABLE=0 $(CONFIGS)
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CONFIG32 := -DNUM_CLUSTERS=4 -DNUM_CORES=8 -DL2_ENABLE=0 -DL3_ENABLE=0 $(CONFIGS)
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CONFIG64 := -DNUM_CLUSTERS=8 -DNUM_CORES=8 -DL2_ENABLE=0 -DL3_ENABLE=0 $(CONFIGS)
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FPU_INCLUDE = -I$(RTL_DIR)/fp_cores -I$(RTL_DIR)/fp_cores/altera/$(DEVICE_FAMILY)
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TEX_INCLUDE = -I$(RTL_DIR)/tex_unit
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RTL_INCLUDE = -I$(RTL_DIR) -I$(RTL_DIR)/libs -I$(RTL_DIR)/interfaces -I$(RTL_DIR)/cache -I$(RTL_DIR)/afu $(FPU_INCLUDE) $(TEX_INCLUDE)
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CFLAGS += $(RTL_INCLUDE)
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# Debugigng
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ifdef DEBUG
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CFLAGS += $(DBG_FLAGS)
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else
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CFLAGS += -DNDEBUG
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endif
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# Enable scope analyzer
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ifdef SCOPE
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CFLAGS += -DSCOPE
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endif
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# Enable perf counters
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ifdef PERF
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CFLAGS += -DPERF_ENABLE
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endif
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all: ase-1c
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$(ASE_BUILD_DIR)_1c/Makefile:
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afu_sim_setup -s setup.cfg $(ASE_BUILD_DIR)_1c
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$(ASE_BUILD_DIR)_2c/Makefile:
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afu_sim_setup -s setup.cfg $(ASE_BUILD_DIR)_2c
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$(ASE_BUILD_DIR)_4c/Makefile:
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afu_sim_setup -s setup.cfg $(ASE_BUILD_DIR)_4c
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$(FPGA_BUILD_DIR)_1c/build/dcp.qpf:
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afu_synth_setup -s setup.cfg $(FPGA_BUILD_DIR)_1c
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$(FPGA_BUILD_DIR)_2c/build/dcp.qpf:
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afu_synth_setup -s setup.cfg $(FPGA_BUILD_DIR)_2c
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$(FPGA_BUILD_DIR)_4c/build/dcp.qpf:
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afu_synth_setup -s setup.cfg $(FPGA_BUILD_DIR)_4c
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$(FPGA_BUILD_DIR)_8c/build/dcp.qpf:
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afu_synth_setup -s setup.cfg $(FPGA_BUILD_DIR)_8c
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$(FPGA_BUILD_DIR)_16c/build/dcp.qpf:
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afu_synth_setup -s setup.cfg $(FPGA_BUILD_DIR)_16c
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$(FPGA_BUILD_DIR)_32c/build/dcp.qpf:
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afu_synth_setup -s setup.cfg $(FPGA_BUILD_DIR)_32c
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$(FPGA_BUILD_DIR)_64c/build/dcp.qpf:
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afu_synth_setup -s setup.cfg $(FPGA_BUILD_DIR)_64c
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gen-sources-1c:
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./gen_sources.sh $(CFLAGS) $(CONFIG1) > sources.txt
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gen-sources-2c:
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./gen_sources.sh $(CFLAGS) $(CONFIG2) > sources.txt
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gen-sources-4c:
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./gen_sources.sh $(CFLAGS) $(CONFIG4) > sources.txt
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gen-sources-8c:
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./gen_sources.sh $(CFLAGS) $(CONFIG8) > sources.txt
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gen-sources-16c:
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./gen_sources.sh $(CFLAGS) $(CONFIG16) > sources.txt
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gen-sources-32c:
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./gen_sources.sh $(CFLAGS) $(CONFIG32) > sources.txt
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gen-sources-64c:
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./gen_sources.sh $(CFLAGS) $(CONFIG64) > sources.txt
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# setup
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setup-ase-1c: $(ASE_BUILD_DIR)_1c/Makefile
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setup-ase-2c: $(ASE_BUILD_DIR)_2c/Makefile
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setup-ase-4c: $(ASE_BUILD_DIR)_4c/Makefile
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setup-fpga-1c: $(FPGA_BUILD_DIR)_1c/build/dcp.qpf
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setup-fpga-2c: $(FPGA_BUILD_DIR)_2c/build/dcp.qpf
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setup-fpga-4c: $(FPGA_BUILD_DIR)_4c/build/dcp.qpf
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setup-fpga-8c: $(FPGA_BUILD_DIR)_8c/build/dcp.qpf
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setup-fpga-16c: $(FPGA_BUILD_DIR)_16c/build/dcp.qpf
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setup-fpga-32c: $(FPGA_BUILD_DIR)_32c/build/dcp.qpf
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setup-fpga-64c: $(FPGA_BUILD_DIR)_64c/build/dcp.qpf
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# build
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ase-1c: gen-sources-1c setup-ase-1c
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make -C $(ASE_BUILD_DIR)_1c
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cp $(RTL_DIR)/fp_cores/altera/$(DEVICE_FAMILY)/*.hex $(ASE_BUILD_DIR)_1c/work
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ase-2c: gen-sources-2c setup-ase-2c
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make -C $(ASE_BUILD_DIR)_2c
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cp $(RTL_DIR)/fp_cores/altera/$(DEVICE_FAMILY)/*.hex $(ASE_BUILD_DIR)_2c/work
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ase-4c: gen-sources-4c setup-ase-4c
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make -C $(ASE_BUILD_DIR)_4c
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cp $(RTL_DIR)/fp_cores/altera/$(DEVICE_FAMILY)/*.hex $(ASE_BUILD_DIR)_4c/work
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fpga-1c: gen-sources-1c setup-fpga-1c
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cd $(FPGA_BUILD_DIR)_1c && $(RUN_SYNTH)
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fpga-2c: gen-sources-2c setup-fpga-2c
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cd $(FPGA_BUILD_DIR)_2c && $(RUN_SYNTH)
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fpga-4c: gen-sources-4c setup-fpga-4c
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cd $(FPGA_BUILD_DIR)_4c && $(RUN_SYNTH)
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fpga-8c: gen-sources-8c setup-fpga-8c
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cd $(FPGA_BUILD_DIR)_8c && $(RUN_SYNTH)
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fpga-16c: gen-sources-16c setup-fpga-16c
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cd $(FPGA_BUILD_DIR)_16c && $(RUN_SYNTH)
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fpga-32c: gen-sources-32c setup-fpga-32c
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cd $(FPGA_BUILD_DIR)_32c && $(RUN_SYNTH)
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fpga-64c: gen-sources-64c setup-fpga-64c
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cd $(FPGA_BUILD_DIR)_64c && $(RUN_SYNTH)
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# cleanup
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clean-ase-1c:
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rm -rf $(ASE_BUILD_DIR)_1c sources.txt
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clean-ase-2c:
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rm -rf $(ASE_BUILD_DIR)_2c sources.txt
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clean-ase-4c:
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rm -rf $(ASE_BUILD_DIR)_4c sources.txt
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clean-fpga-1c:
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rm -rf $(FPGA_BUILD_DIR)_1c sources.txt
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clean-fpga-2c:
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rm -rf $(FPGA_BUILD_DIR)_2c sources.txt
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clean-fpga-4c:
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rm -rf $(FPGA_BUILD_DIR)_4c sources.txt
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clean-fpga-8c:
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rm -rf $(FPGA_BUILD_DIR)_8c sources.txt
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clean-fpga-16c:
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rm -rf $(FPGA_BUILD_DIR)_16c sources.txt
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clean-fpga-32c:
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rm -rf $(FPGA_BUILD_DIR)_32c sources.txt
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clean-fpga-64c:
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rm -rf $(FPGA_BUILD_DIR)_64c sources.txt
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clean: clean-ase-1c clean-ase-2c clean-ase-4c clean-fpga-1c clean-fpga-2c clean-fpga-4c clean-fpga-8c clean-fpga-16c clean-fpga-32c clean-fpga-64c |