21 lines
408 B
Verilog
21 lines
408 B
Verilog
`ifndef VX_GPR_REQ_IF
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`define VX_GPR_REQ_IF
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`include "VX_define.vh"
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interface VX_gpr_req_if ();
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wire valid;
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wire [`NW_BITS-1:0] wid;
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wire [31:0] PC;
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wire [`NR_BITS-1:0] rs1;
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wire [`NR_BITS-1:0] rs2;
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wire [`NR_BITS-1:0] rs3;
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wire use_rs3;
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wire ready;
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endinterface
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`endif |