10 Commits

Author	SHA1	Message	Date
Blaise Tine	c1e168fdbe	Vortex 2.0 changes: ... + Microarchitecture optimizations + 64-bit support + Xilinx FPGA support + LLVM-16 support + Refactoring and quality control fixes minor update minor update minor update minor update minor update minor update cleanup cleanup cache bindings and memory perf refactory minor update minor update hw unit tests fixes minor update minor update minor update minor update minor update minor udpate minor update minor update minor update minor update minor update minor update minor update minor updates minor updates minor update minor update minor update minor update minor update minor update minor updates minor updates minor updates minor updates minor update minor update	2023-11-10 02:47:05 -08:00
Blaise Tine	140124b423	additional bug fixes	2022-02-05 07:42:50 -05:00
Blaise Tine	5fbace9fa0	fixed several bugs and refactor memory access	2022-02-04 17:50:19 -05:00
Blaise Tine	cf2a0a5f39	code refactoring	2022-02-04 00:07:24 -05:00
Santosh Srivatsan	836c777680	XLEN parameterization for simx	2022-02-03 15:19:31 -05:00
Santosh Srivatsan	91c22a2592	Fixed some riscv-tests	2022-01-22 12:54:10 -05:00
Santosh Srivatsan	b1e82223ee	Renamed rv_f* functions to rvf*_s to follow the naming convention between single and double precision floating point	2021-12-13 20:37:29 -05:00
Santosh Raghav Srivatsan	bde789b320	Added support for RV32D and RV64D instructions	2021-12-10 16:30:24 -05:00
Santosh Raghav Srivatsan	e6eda67d0c	Modified RV32F instructions to support 64-bit register file and added RV64F ISA extension	2021-12-06 18:55:13 -05:00
Blaise Tine	48b2238a1f	adding rvfloats library	2021-10-10 13:26:11 -07:00