10 Commits

Include renames

Author	SHA1	Message	Date
Blaise Tine	bdfacf709c	yosys synthesis refactoring	2020-07-10 18:56:41 -04:00
Blaise Tine	a70562d386	set target synthesis freq=200 MHz, set 4-cores as default config, MULT.latency=1, DIV.latency=18	2020-06-29 08:03:19 -07:00
Blaise Tine	d33916f1e0	minor update	2020-06-29 00:38:59 -07:00
Blaise Tine	8a306de02d	runtime static library	2020-06-27 14:13:13 -04:00
Blaise Tine	b7d7e69f47	fixed assertion in lsu_unit	2020-06-26 00:27:55 -04:00
Blaise Tine	e6cc221a44	refactoring	2020-06-23 10:59:30 -07:00
Blaise Tine	d3440de403	round robin arbiter + auto buffered queue + fixed dcache arbiter	2020-06-20 17:56:04 -04:00
Blaise Tine	68d9fc9a75	driver basic test and demo test refactoring	2020-06-19 09:12:07 -07:00
Blaise Tine	d6b0ef2b3c	scope refactoring + snoop invalidate	2020-06-12 00:04:31 -07:00
Blaise Tine	106d707024	verilator suppor for opae (partial)	2020-06-03 06:22:49 -04:00