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Author SHA1 Message Date
Blaise Tine da834a28df adding support for TLS global variables 2022-07-14 06:03:02 -04:00
Blaise Tine 77002dd06a minor updates 2022-02-05 20:52:23 -05:00
Blaise Tine 76481bc794 minor update 2022-02-05 20:41:44 -05:00
Blaise Tine 5a5f1ad3fe minor update 2022-02-05 18:03:38 -05:00
Blaise Tine 2277e3c878 minor update 2022-02-05 17:59:58 -05:00
Blaise Tine 1bd25acb0b cmov 2022-02-05 17:58:12 -05:00
Blaise Tine d297351211 simx64 bug fix 2022-02-05 17:13:16 -05:00
Blaise Tine 2fd93e1d89 Merge branch 'staging' of https://github.com/vortexgpgpu/vortex 2022-02-05 16:12:52 -05:00
tinebpandGitHub a5ab68d9df Merge pull request #42 from SantoshSrivatsan24/staging 
Staging
 2022-02-05 14:55:49 -05:00
Santosh Srivatsan 1b5b7a3cba Modified travis.yml 2022-02-05 14:45:21 -05:00
Santosh Srivatsan 6dd6a88c12 Modified regression64.sh 2022-02-05 14:37:05 -05:00
Santosh Srivatsan 09833fdfb1 Fixed merge conflict 2022-02-05 14:34:36 -05:00
tinebpandGitHub eacdb63454 Merge pull request #41 from SantoshSrivatsan24/staging 
Staging
 2022-02-05 14:25:17 -05:00
Santosh Srivatsan 1c781c78c0 Minor bug fix 2022-02-05 14:17:56 -05:00
Santosh Srivatsan b7e5a83ba3 Merged branch xlen-parameterization into staging 2022-02-05 13:47:42 -05:00
Blaise Tine 3179541efe minor update 2022-02-05 12:24:16 -05:00
Blaise Tine bda77760c8 addition bug fixes 2022-02-05 09:14:35 -05:00
Blaise Tine 140124b423 additional bug fixes 2022-02-05 07:42:50 -05:00
Blaise Tine 703d3faf27 minor bug fixes 2022-02-05 06:37:54 -05:00
Blaise Tine a2342cfd82 toolchain install bug fix 2022-02-05 05:19:53 -05:00
Blaise Tine 5fbace9fa0 fixed several bugs and refactor memory access 2022-02-04 17:50:19 -05:00
Blaise Tine cf2a0a5f39 code refactoring 2022-02-04 00:07:24 -05:00
Santosh Srivatsan 212ee21b54 Updated excluded 32-bit tests 2022-02-03 22:33:47 -05:00
Santosh Srivatsan 71e8a30186 Added vx_link32.ld 2022-02-03 22:31:47 -05:00
Santosh Srivatsan 8a525039af Added 64 bit regression script 2022-02-03 15:20:15 -05:00
Santosh Srivatsan 836c777680 XLEN parameterization for simx 2022-02-03 15:19:31 -05:00
Blaise Tine a3472da181 Merge branch 'master' of https://github.com/vortexgpgpu/vortex 2022-02-02 01:24:00 -05:00
Blaise Tine a06812f93f minor updates 2022-02-01 22:51:33 -05:00
Santosh Srivatsan 54dd2cfe1d Added xlen parameterization to types.h instead of xlen.h 2022-02-01 14:02:46 -05:00
Santosh Srivatsan 01d183c6a9 Removed xlen.h 2022-02-01 13:59:39 -05:00
Santosh Srivatsan 3eb2b71955 removed traces of xlen. Overloaded sext 2022-02-01 13:54:51 -05:00
Santosh Srivatsan b23a9c76e7 Changed run-simx-32imf to run-simx to comply with the rest of the code 2022-02-01 13:26:41 -05:00
Santosh Srivatsan 0ce51df108 Removed simx64 comments 2022-02-01 13:25:26 -05:00
Blaise Tine d48f1c1c5f minor updates 2022-02-01 06:53:31 -05:00
Santosh Srivatsan a73f656d06 Minor bug fixes 2022-01-31 17:01:14 -05:00
Santosh Srivatsan 4cf596338d Minor bug fixes 2022-01-31 15:53:49 -05:00
Blaise Tine e3e2609f7e adding unit test for vx_malloc 2022-01-30 05:57:18 -05:00
Blaise Tine 3750c672a7 Makefiles update 2022-01-30 00:26:55 -05:00
Blaise Tine f7887d8720 refactoring device memory allocation and cleanup 2022-01-28 21:57:16 -05:00
Santosh Srivatsan 7e3a2fdb0f Modifications to allow 64-bit riscv tests to run on travis CI 2022-01-27 15:55:19 -05:00
Santosh Srivatsan 7aa93a735d Added FLEN parameterization for RV32/64 F and D instructions 2022-01-24 15:42:15 -05:00
Santosh Srivatsan ad92c09f5b Changed all instances of DWord to XWord and DWordI to XWordI. Added XLEN parameterization to the simx Makefile 2022-01-22 13:47:44 -05:00
Santosh Srivatsan 91c22a2592 Fixed some riscv-tests 2022-01-22 12:54:10 -05:00
tinebpandGitHub d3c65edcf5 Update README.md 2022-01-21 13:18:19 -05:00
Santosh Srivatsan d762d401cd Added 64-bit linker script 2022-01-11 17:22:16 -05:00
Blaise Tine 29df0da8b5 minor warning fixes 2022-01-10 20:33:37 -05:00
Santosh Srivatsan d7e2a6b3b1 Minor update 2021-12-18 16:27:29 -05:00
Santosh Srivatsan a9e3104ce1 Removed ramulator log from tests/riscv/isa 2021-12-15 17:30:12 -05:00
Santosh Srivatsan f93303bac7 Minor update 2021-12-15 17:21:38 -05:00
Santosh Srivatsan 71acf4eadb Changed instruction size from wsize() * 4 to wsize() * 8 2021-12-13 20:42:44 -05:00