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2,363 Commits 9 Branches 0 Tags
d848e88f728555c1b5544664c94f10948eb19528
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10 Commits
Author SHA1 Message Date
Blaise Tine d47cccc157 Vortex 2.0 changes:
+ Microarchitecture optimizations
+ 64-bit support
+ Xilinx FPGA support
+ LLVM-16 support
+ Refactoring and quality control fixes
2023-10-19 20:51:22 -07:00
Blaise Tine 30d9d3e956 minor update 2021-12-06 13:17:51 -05:00
Blaise Tine 2a7a4df342 simx directory name fix 2021-11-30 07:17:58 -05:00
Blaise Tine f6f95e0c46 mutiple fixes: parallel printf, fixed cycle in cache, opencl refactored vecadd and sgemm, regen opencl kernels with hard-float, fixed vortex io bus interface, fixed dpi floats APi to support multicore mode, make vlsim multicore default, make rtlsim multi-core default, removed POCL binaries from repository, updated Makefiles to use external POCL 2020-09-19 14:45:42 -04:00
MalikBurton 9b69cd430d Moved runtime/tests/vector_test directory to miscs/rvvector 2020-07-15 14:26:22 -04:00
Blaise Tine d1103733f5 merge fixes 2020-06-23 14:34:23 -07:00
Blaise Tine b56fb31a6a fpga_synthesis merge 2020-06-23 12:41:26 -07:00
Blaise Tine 69f607b73e rtl refactoring 2020-05-03 17:10:02 -04:00
Blaise Tine c913e542e9 adding POCL Dockerfile 2020-04-14 19:46:53 -04:00
Blaise Tine 12dc4d6874 refactoring fixes 2020-04-14 19:39:59 -04:00
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