Blaise Tine
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be0db6e1a5
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minor update
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2024-02-04 20:32:05 -08:00 |
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6f7a389a1f
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arbiters unlock refactoring
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2024-02-04 20:16:18 -08:00 |
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f9cd8be19e
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minor update
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2024-01-31 13:35:43 -08:00 |
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e2d1387df8
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elastic buffers classification
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2024-01-31 00:39:37 -08:00 |
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e04e026a14
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profiling update
minor updates
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2023-12-18 04:43:44 -08:00 |
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c6845a4c8d
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profiling timing optimization
minor update
minor update
minor update
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2023-12-18 04:43:10 -08:00 |
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6c7ac35054
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profiling optimizations
minor updates
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2023-12-18 04:43:00 -08:00 |
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24973ffca0
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scoreboard optimization & profiling
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2023-11-27 05:53:36 -08:00 |
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ebec982434
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minor update
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2023-11-27 02:04:53 -08:00 |
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d13c5f2986
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hw unit tests fixes
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2023-11-05 18:51:31 -08:00 |
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d47cccc157
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Vortex 2.0 changes:
+ Microarchitecture optimizations
+ 64-bit support
+ Xilinx FPGA support
+ LLVM-16 support
+ Refactoring and quality control fixes
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2023-10-19 20:51:22 -07:00 |
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Blaise Tine
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d48f1c1c5f
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minor updates
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2022-02-01 06:53:31 -05:00 |
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Blaise Tine
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41d7e6c63a
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cummulative fixes, RTL uuid trace, texture unit fixes, simx timing fixes
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2021-11-30 07:08:15 -05:00 |
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bf72800676
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debug tracing refactoring
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2021-10-17 13:42:16 -07:00 |
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8e82ee00a0
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minor update
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2021-09-29 09:32:21 -07:00 |
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04249c3ee9
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code refactoring for Vivado compatibility
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2021-09-29 04:48:53 -04:00 |
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a45261b530
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code refactoring for Vivado compatibility
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2021-09-29 03:24:17 -04:00 |
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132260d84c
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minor update
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2021-09-27 09:23:58 -04:00 |
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Blaise Tine
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9f34b2944c
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code refactoring for Vivado, sv2v, and yosys compatibility
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2021-09-27 08:55:10 -04:00 |
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9b04f3d9d6
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Updated README and synthesis scripts
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2021-09-22 07:50:47 -07:00 |
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feca2db24e
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critical path optimizations
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2021-09-15 04:50:45 -07:00 |
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83d80c061f
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Merge branch 'master' of https://github.gatech.edu/casl/Vortex
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2021-09-14 05:11:28 -04:00 |
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3d7baf1640
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block ram read enable fix
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2021-09-14 01:45:01 -07:00 |
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Blaise Tine
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6652e2f0e9
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minor update
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2021-09-11 18:16:08 -07:00 |
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Blaise Tine
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6f09fb8ba5
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Merge branch 'master' of https://github.gatech.edu/casl/Vortex
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2021-09-11 18:26:08 -04:00 |
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95287980af
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minor update
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2021-09-11 15:14:17 -07:00 |
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0dfdf6cd4d
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Merge branch 'master' of https://github.gatech.edu/casl/Vortex
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2021-09-10 06:03:32 -04:00 |
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5192846c72
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minor updates
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2021-09-10 02:57:05 -07:00 |
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18172fa611
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AXI memory bus support
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2021-09-10 01:36:01 -07:00 |
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ca46b0a0be
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OUTPUT_REG => OUT_REG renaming
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2021-09-09 03:05:38 -07:00 |
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a46c32ed4b
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Adding Vortex Yosys build support
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2021-09-08 23:04:33 -04:00 |
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Blaise Tine
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c06efbf480
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minor update
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2021-09-07 23:47:41 -07:00 |
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Blaise Tine
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0d91f8771e
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Workaround fix for Verilator bug with array indexing
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2021-09-07 23:28:54 -07:00 |
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Blaise Tine
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d42baf34ff
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minor update
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2021-09-06 23:44:31 -07:00 |
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Blaise Tine
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af1cecae07
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stream arbiter update
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2021-09-06 23:38:20 -07:00 |
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Blaise Tine
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b52ace5142
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area optimization bundle
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2021-09-05 23:35:44 -07:00 |
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Blaise Tine
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fe5112b6c1
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minor updates
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2021-09-05 23:05:21 -07:00 |
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Blaise Tine
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377466ed1c
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fpu area optimization
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2021-09-05 21:01:52 -07:00 |
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Blaise Tine
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f3ba27b138
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GPRs optimization - disabling BRAM's read-during-write bypass block.
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2021-08-28 15:34:36 -07:00 |
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Blaise Tine
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28eb3cfdb2
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minor update
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2021-08-26 14:49:57 -07:00 |
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Blaise Tine
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74a45e2772
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stream arbiter optimization (using indexing instead of onehot mux)
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2021-08-26 09:52:13 -07:00 |
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Blaise Tine
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d91d56d126
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block ram refactoring (multi-porting supporting and simulation support)
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2021-08-26 08:19:44 -07:00 |
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Blaise Tine
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e494860f38
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using lzc instead of priority_encoder
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2021-08-26 07:29:47 -07:00 |
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Blaise Tine
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2a27bfbfd5
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LKG Build (reset network update -fmax=236 mhz 4c)
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2021-08-23 01:59:22 -07:00 |
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Blaise Tine
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eef3dda81d
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fixed Verilator error
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2021-08-13 19:33:12 -07:00 |
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Blaise Tine
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646371f9e9
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bram block optimization
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2021-08-13 19:31:55 -07:00 |
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Blaise Tine
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f12be56d7c
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fixed Verilator warnings
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2021-08-13 05:52:43 -04:00 |
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Blaise Tine
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7961cf7474
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Disabling tracing on library
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2021-08-12 01:55:52 -07:00 |
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Blaise Tine
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7b8fe11e6a
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unused variables refactoring
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2021-08-05 01:46:26 -07:00 |
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Blaise Tine
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79fd92a1b4
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minor update
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2021-07-30 17:43:15 -07:00 |
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