11 Commits

Include renames

Author	SHA1	Message	Date
Blaise Tine	2f5ccdcf45	quartus synthesis build update	2021-04-19 21:29:39 -07:00
Blaise Tine	d44144f72f	FPU float<->int conversion optimization	2020-12-29 15:37:45 -08:00
Blaise Tine	25df233005	Adding Altera Stratix 10 support	2020-12-27 10:44:57 -08:00
Blaise Tine	6c12391338	pipeline refactoring - fmax >= 222 mhz	2020-08-14 21:50:14 -07:00
Blaise Tine	836a735555	minor updates	2020-07-31 13:39:52 -07:00
Blaise Tine	c2dd0a8b39	modelsim fixes && pipeline optimization	2020-07-28 14:20:23 -07:00
Blaise Tine	bdfacf709c	yosys synthesis refactoring	2020-07-10 18:56:41 -04:00
Blaise Tine	21e04a0cb0	minor update	2020-06-28 22:58:18 -07:00
Blaise Tine	68d9fc9a75	driver basic test and demo test refactoring	2020-06-19 09:12:07 -07:00
Blaise Tine	e2e1b63e14	refactor synthesis scripts + fixed quartus ram read-after-write bypass	2020-06-16 11:45:47 -07:00
Blaise Tine	457783322b	scope fixes	2020-06-09 07:03:52 -07:00