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810 Commits 9 Branches 0 Tags
91a926e3b6c37d1f82adae6c9ed3d36fd9397c3b
Commit Graph
37 Commits
Author SHA1 Message Date
felsabbagh3 165836332c Fixed snp delay for sm 2020-04-04 18:21:25 -07:00
felsabbagh3 bcea9866a7 Fixed a couple of things 2020-04-04 18:20:06 -07:00
felsabbagh3 65fa9285bf Fixed Flushing and Prefetching 2020-04-04 17:57:35 -07:00
felsabbagh3 efac643c66 Added Proper Handshaking to Everything and Fixed a Couple of Bugs 2020-03-29 02:11:14 -07:00
felsabbagh3 13c6cbfa5d L3 and CLUSTRING WORKS 2020-03-10 02:41:47 -07:00
felsabbagh3 cf0173ae15 Fixed Stall Pipeline Logic 2020-03-09 22:08:46 -07:00
felsabbagh3 e2ffbcf14b MULTICORE WITH L2 WORKING 2020-03-09 01:17:11 -07:00
felsabbagh3 b5b04a7070 Added Shared Memory 2020-03-08 15:00:53 -07:00
felsabbagh3 b9a95631bc Icache stage mods + removed shared memory 2020-03-08 14:04:55 -07:00
felsabbagh3 2f94b26af0 Icache working 2020-03-08 13:59:35 -07:00
felsabbagh3 f03f3fe037 Fixed all Cache Warnings 2020-03-07 14:34:05 -08:00
felsabbagh3 9bf0add937 Made the cache module configurable for multi-instantiation 2020-03-07 00:49:40 -08:00
Blaise Tine 33868512ac synthesis fixes 2020-03-05 07:03:23 -05:00
Blaise Tine 66a46f81ce synthesis fixes 2020-03-05 06:58:51 -05:00
felsabbagh3 457e8644f3 Added Snoop Invalidate/Writeback Req type 2020-03-05 01:30:16 -08:00
felsabbagh3 b0b9b8238e Passing some cases 2020-03-04 04:05:54 -08:00
felsabbagh3 8f001ac6f2 Added All Interfaces 2020-03-03 22:48:49 -08:00
felsabbagh3 73cecd3866 Added Core Interface 2020-03-03 22:14:56 -08:00
Lyons, Ethan TylerandGitHub Enterprise 2994e607e3 Shared Memory Implemented 2019-11-13 10:06:13 -05:00
felsabbagh3 b67ba1881b Fixed valid signal 2019-11-13 01:58:04 -05:00
Lyons, Ethan TylerandGitHub Enterprise b0f685c2e2 Add files via upload 
ICache_In_Place
 2019-11-08 10:55:08 -05:00
felsabbagh3 58a9140f08 Before evict_wb_old removal 2019-11-07 13:27:38 -05:00
Savan Roshan e4ee2a9cbd Parameterization working 2019-11-07 00:14:46 -05:00
Savan Roshan 8264339853 Added Parameterization 2019-11-04 13:20:34 -05:00
felsabbagh3 46b09028d0 Added runtime (kernel 2.0) 2019-10-30 23:40:01 -04:00
felsabbagh3 7863175233 Set associative bank working 2019-10-30 14:57:20 -04:00
felsabbagh3 715982cca7 Modelsim Working + Simulating + dumping - Some bugs 2019-10-27 03:36:02 -04:00
felsabbagh3 1181af1df2 Modelsim basic sim 2019-10-26 00:34:57 -04:00
felsabbagh3 820007ae80 NUM_REQ 2019-10-25 13:46:31 -04:00
felsabbagh3 c85c01e082 Parametized cache 2019-10-25 13:36:06 -04:00
felsabbagh3 89d0390965 CACHE FINALLY WORKING 2019-10-25 04:01:23 -04:00
felsabbagh3 01efe02e8b CACHE WORKING just needs lb/sb 2019-10-25 03:03:09 -04:00
felsabbagh3 1e648c5819 FIxed first circular issue 2019-10-24 10:38:04 -04:00
felsabbagh3 de8de00f6e Finished cache not tested 2019-10-23 19:07:26 -04:00
felsabbagh3 6340ffcc2a new cache states 2019-10-23 15:07:14 -04:00
felsabbagh3 9d8273afe4 Finished Cache Integration 2019-10-22 06:02:08 -04:00
felsabbagh3 b7af8c3f34 Integrated Shared Memory 2019-10-22 05:03:47 -04:00