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7425446b1596600ae74f5b48f298a3c938455ca0
Commit Graph
43 Commits
Author SHA1 Message Date
Blaise Tine 7425446b15 fixed DESTDIR support in simumation Makefiles 2023-12-29 14:11:16 -08:00
Blaise Tine e62d122c9b enabling temporary build directory for blackbox multiple instances 2023-12-28 20:06:10 -08:00
Blaise Tine e217bc2c23 adding tracking for SFU stalls 2023-12-28 12:12:11 -08:00
Blaise Tine c7a81d1493 adding sockets support to simx and cache subsystem refactoring 
minor update

minor update

minor updates
 2023-12-20 15:16:12 -08:00
Blaise Tine e04e026a14 profiling update 
minor updates
 2023-12-18 04:43:44 -08:00
Blaise Tine 4b68235389 fixed simx dispatcher bug 2023-11-27 04:50:55 -08:00
Blaise Tine 970cbf066a cleanup 2023-11-03 08:09:59 -04:00
Blaise Tine 65ca0fff3a minor update 2023-10-20 00:48:05 -07:00
Blaise Tine d47cccc157 Vortex 2.0 changes: 
+ Microarchitecture optimizations
+ 64-bit support
+ Xilinx FPGA support
+ LLVM-16 support
+ Refactoring and quality control fixes
 2023-10-19 20:51:22 -07:00
Blaise Tine 1bd25acb0b cmov 2022-02-05 17:58:12 -05:00
Blaise Tine d297351211 simx64 bug fix 2022-02-05 17:13:16 -05:00
Santosh Srivatsan b7e5a83ba3 Merged branch xlen-parameterization into staging 2022-02-05 13:47:42 -05:00
Blaise Tine bda77760c8 addition bug fixes 2022-02-05 09:14:35 -05:00
Blaise Tine 140124b423 additional bug fixes 2022-02-05 07:42:50 -05:00
Blaise Tine 703d3faf27 minor bug fixes 2022-02-05 06:37:54 -05:00
Blaise Tine 5fbace9fa0 fixed several bugs and refactor memory access 2022-02-04 17:50:19 -05:00
Blaise Tine cf2a0a5f39 code refactoring 2022-02-04 00:07:24 -05:00
Santosh Srivatsan 836c777680 XLEN parameterization for simx 2022-02-03 15:19:31 -05:00
Blaise Tine a06812f93f minor updates 2022-02-01 22:51:33 -05:00
Santosh Srivatsan 54dd2cfe1d Added xlen parameterization to types.h instead of xlen.h 2022-02-01 14:02:46 -05:00
Blaise Tine f7887d8720 refactoring device memory allocation and cleanup 2022-01-28 21:57:16 -05:00
Santosh Srivatsan 7e3a2fdb0f Modifications to allow 64-bit riscv tests to run on travis CI 2022-01-27 15:55:19 -05:00
Santosh Srivatsan 7aa93a735d Added FLEN parameterization for RV32/64 F and D instructions 2022-01-24 15:42:15 -05:00
Santosh Srivatsan ad92c09f5b Changed all instances of DWord to XWord and DWordI to XWordI. Added XLEN parameterization to the simx Makefile 2022-01-22 13:47:44 -05:00
Santosh Srivatsan 91c22a2592 Fixed some riscv-tests 2022-01-22 12:54:10 -05:00
Santosh Srivatsan d762d401cd Added 64-bit linker script 2022-01-11 17:22:16 -05:00
Blaise Tine 29df0da8b5 minor warning fixes 2022-01-10 20:33:37 -05:00
Santosh Srivatsan f93303bac7 Minor update 2021-12-15 17:21:38 -05:00
Santosh Srivatsan 71acf4eadb Changed instruction size from wsize() * 4 to wsize() * 8 2021-12-13 20:42:44 -05:00
Santosh Srivatsan d8796efd89 Minor update 2021-12-13 20:39:40 -05:00
Santosh Srivatsan 76eb79d7fa Removed pipeline.cpp 2021-12-13 19:57:47 -05:00
Santosh Srivatsan 4abfca4cb2 Replaced all instanced of DoubleWord to DWord and DoubleWordI to DWordI 2021-12-13 19:55:02 -05:00
Santosh Srivatsan e82d5fe48f Removed all comments labelled \'simx64\' 2021-12-13 19:52:13 -05:00
Santosh Srivatsan 67daa6e616 Minor update 2021-12-11 17:58:31 -05:00
Santosh Srivatsan 885bb58ca9 Merged RV64IMFD extensions to master branch 2021-12-11 17:06:29 -05:00
Santosh Srivatsan 5edb9098ce Merge branch 'simx64' 2021-12-10 21:48:29 -05:00
Santosh Srivatsan e7bc436b52 Renamed simX to simx 2021-12-10 16:57:29 -05:00
Blaise Tine 0e2de4f13a prefetch test fixes 2021-12-09 04:54:10 -05:00
Blaise Tine 5825b7c15a dram simulator fix 2021-12-07 22:44:06 -05:00
Blaise Tine b741807f8c using ramulator dram simulator 2021-12-06 01:22:45 -05:00
Blaise Tine 189cec3ca2 minor update 2021-12-01 10:36:50 -05:00
Blaise Tine 092ff42ab4 simx multicore fix 2021-12-01 00:12:16 -05:00
Blaise Tine 2a7a4df342 simx directory name fix 2021-11-30 07:17:58 -05:00