wu-arch/kernels
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity
492 Commits 7 Branches 0 Tags
62ab6b3e98934e7db5747bb23400746416c8a377
Commit Graph

2 Commits

Author SHA1 Message Date
Lingjun Zhu
50d567d70c Removed unnessary Verilog files, linked memory tech files, having problem with memory instatiation 2019-10-28 14:49:55 -04:00
Lingjun Zhu
93531715bb Created a testbench and simulated the read/write of the register file 2019-10-18 22:55:34 -04:00