Texture Instruction - Fixed Color

This commit is contained in:
Krishna Yalamarthy
2021-03-12 18:33:04 -05:00
parent b8b3267757
commit f3f62e9e7b
49 changed files with 2636 additions and 63 deletions

View File

@@ -11,6 +11,7 @@ module VX_writeback #(
VX_commit_if ld_commit_if,
VX_commit_if csr_commit_if,
VX_commit_if fpu_commit_if,
VX_commit_if gpu_commit_if,
// outputs
VX_writeback_if writeback_if
@@ -19,6 +20,7 @@ module VX_writeback #(
wire fpu_valid = fpu_commit_if.valid && fpu_commit_if.wb;
wire csr_valid = csr_commit_if.valid && csr_commit_if.wb;
wire alu_valid = alu_commit_if.valid && alu_commit_if.wb;
wire gpu_valid = gpu_commit_if.valid && gpu_commit_if.wb;
wire wb_valid;
wire [`NW_BITS-1:0] wb_wid;
@@ -31,37 +33,44 @@ module VX_writeback #(
assign wb_valid = ld_valid |
fpu_valid |
csr_valid |
alu_valid;
alu_valid |
gpu_valid;
assign wb_wid = ld_valid ? ld_commit_if.wid :
fpu_valid ? fpu_commit_if.wid :
csr_valid ? csr_commit_if.wid :
/*alu_valid ?*/ alu_commit_if.wid;
alu_valid ? alu_commit_if.wid :
/*gpu_valid*/ gpu_commit_if.wid;
assign wb_PC = ld_valid ? ld_commit_if.PC :
fpu_valid ? fpu_commit_if.PC :
csr_valid ? csr_commit_if.PC :
/*alu_valid ?*/ alu_commit_if.PC;
alu_valid ? alu_commit_if.PC :
/*gpu_valid*/ gpu_commit_if.PC;
assign wb_tmask = ld_valid ? ld_commit_if.tmask :
fpu_valid ? fpu_commit_if.tmask :
csr_valid ? csr_commit_if.tmask :
/*alu_valid ?*/ alu_commit_if.tmask;
alu_valid ? alu_commit_if.tmask :
/*gpu_valid*/ gpu_commit_if.tmask;
assign wb_rd = ld_valid ? ld_commit_if.rd :
fpu_valid ? fpu_commit_if.rd :
csr_valid ? csr_commit_if.rd :
/*alu_valid ?*/ alu_commit_if.rd;
alu_valid ? alu_commit_if.rd :
/*gpu_valid*/ gpu_commit_if.rd;
assign wb_data = ld_valid ? ld_commit_if.data :
fpu_valid ? fpu_commit_if.data :
csr_valid ? csr_commit_if.data :
/*alu_valid ?*/ alu_commit_if.data;
alu_valid ? alu_commit_if.data :
/*gpu_valid*/ gpu_commit_if.data;
assign wb_eop = ld_valid ? ld_commit_if.eop :
fpu_valid ? fpu_commit_if.eop :
csr_valid ? csr_commit_if.eop :
/*alu_valid ?*/ alu_commit_if.eop;
alu_valid ? alu_commit_if.eop :
/*gpu_valid*/ gpu_commit_if.eop;
wire stall = ~writeback_if.ready && writeback_if.valid;
@@ -79,7 +88,9 @@ module VX_writeback #(
assign ld_commit_if.ready = !stall;
assign fpu_commit_if.ready = !stall && !ld_valid;
assign csr_commit_if.ready = !stall && !ld_valid && !fpu_valid;
assign alu_commit_if.ready = !stall && !ld_valid && !fpu_valid && !csr_valid;
assign alu_commit_if.ready = !stall && !ld_valid && !fpu_valid && !csr_valid;
// if not TEX instruction, no writeback and commit is ready
assign gpu_commit_if.ready = (!stall && !ld_valid && !fpu_valid && !csr_valid && !alu_valid) || !gpu_commit_if.wb ;
// special workaround to get RISC-V tests Pass/Fail status
reg [31:0] last_wb_value [`NUM_REGS-1:0] /* verilator public */;