diff --git a/rtl/VX_back_end.v b/rtl/VX_back_end.v
index e69de29b..a285f40c 100644
--- a/rtl/VX_back_end.v
+++ b/rtl/VX_back_end.v
@@ -0,0 +1,117 @@
+module VX_back_end (
+	input wire clk, 
+	input wire reset, 
+	input wire fetch_delay,
+
+	input wire[31:0]        csr_decode_csr_data,
+	output wire              execute_branch_stall,
+
+	output wire              out_mem_delay,
+
+	VX_jal_response_inter    VX_jal_rsp,
+	VX_branch_response_inter VX_branch_rsp,
+
+
+	VX_frE_to_bckE_req_inter VX_bckE_req,
+	VX_wb_inter              VX_writeback_inter,
+
+	VX_dcache_response_inter VX_dcache_rsp,
+	VX_dcache_request_inter VX_dcache_req,
+
+	VX_forward_exe_inter     VX_fwd_exe,
+	VX_forward_mem_inter     VX_fwd_mem,
+	VX_forward_wb_inter      VX_fwd_wb,
+
+
+	VX_csr_write_request_inter VX_csr_w_req
+);
+
+wire   memory_delay;
+
+assign out_mem_delay = memory_delay;
+
+
+wire total_freeze = fetch_delay || memory_delay;
+
+wire[11:0]      execute_csr_address;
+wire            execute_is_csr;
+reg[31:0]       execute_csr_result;
+wire            execute_jal;
+wire[31:0]      execute_jal_dest;
+
+
+
+
+
+VX_mw_wb_inter   VX_mw_wb();
+
+
+VX_mem_req_inter  VX_exe_mem_req();
+VX_mem_req_inter  VX_mem_req();
+
+VX_inst_mem_wb_inter     VX_mem_wb();
+
+VX_execute vx_execute(
+		.VX_bckE_req      (VX_bckE_req),
+		.VX_fwd_exe       (VX_fwd_exe),
+		.in_csr_data      (csr_decode_csr_data),
+
+		.VX_exe_mem_req   (VX_exe_mem_req),
+		.out_csr_address  (execute_csr_address),
+		.out_is_csr       (execute_is_csr),
+		.out_csr_result   (execute_csr_result),
+		.out_jal          (execute_jal),
+		.out_jal_dest     (execute_jal_dest),
+		.out_branch_stall (execute_branch_stall)
+	);
+
+
+assign VX_jal_rsp.jal_warp_num = VX_mem_req.warp_num;
+
+VX_e_m_reg vx_e_m_reg(
+		.clk              (clk),
+		.reset            (reset),
+		.in_csr_address   (execute_csr_address),
+		.in_is_csr        (execute_is_csr),
+		.in_csr_result    (execute_csr_result),
+		.in_jal           (execute_jal),
+		.in_jal_dest      (execute_jal_dest),
+		.in_freeze        (total_freeze),
+		.VX_exe_mem_req   (VX_exe_mem_req),
+
+		.VX_mem_req       (VX_mem_req),
+		.out_csr_address  (VX_csr_w_req.csr_address),
+		.out_is_csr       (VX_csr_w_req.is_csr),
+		.out_csr_result   (VX_csr_w_req.csr_result),
+		.out_jal          (VX_jal_rsp.jal),
+		.out_jal_dest     (VX_jal_rsp.jal_dest)
+	);
+
+VX_memory vx_memory(
+		.VX_mem_req                   (VX_mem_req),
+		.VX_mem_wb                    (VX_mem_wb),
+		.VX_fwd_mem                   (VX_fwd_mem),
+		.out_delay                    (memory_delay),
+
+		.VX_branch_rsp                (VX_branch_rsp),
+
+		.VX_dcache_rsp(VX_dcache_rsp),
+		.VX_dcache_req (VX_dcache_req)
+	);
+
+VX_m_w_reg vx_m_w_reg(
+		.clk       (clk),
+		.reset     (reset),
+		.in_freeze (total_freeze),
+		.VX_mem_wb (VX_mem_wb),
+		.VX_mw_wb  (VX_mw_wb)
+	);
+
+
+VX_writeback vx_writeback(
+		.VX_mw_wb          (VX_mw_wb),
+		.VX_fwd_wb         (VX_fwd_wb),
+		.VX_writeback_inter(VX_writeback_inter)
+	);
+
+endmodule
\ No newline at end of file
diff --git a/rtl/VX_csr_handler.v b/rtl/VX_csr_handler.v
index 5ed9849f..e136ce3b 100644
--- a/rtl/VX_csr_handler.v
+++ b/rtl/VX_csr_handler.v
@@ -3,15 +3,22 @@
 module VX_csr_handler (
 		input wire        clk,
 		input wire[11:0]  in_decode_csr_address, // done
-		input wire[11:0]  in_mem_csr_address,
-		input wire        in_mem_is_csr,
-		/* verilator lint_off UNUSED */
-		input wire[31:0]  in_mem_csr_result,
-		/* verilator lint_on UNUSED */
+		VX_csr_write_request_inter VX_csr_w_req,
 		input wire        in_wb_valid,
 		output wire[31:0] out_decode_csr_data // done
 	);
 
+		wire       in_mem_is_csr;
+		wire[11:0] in_mem_csr_address;
+		/* verilator lint_off UNUSED */
+		wire[31:0] in_mem_csr_result;
+		/* verilator lint_on UNUSED */
+
+
+		assign in_mem_is_csr      = VX_csr_w_req.is_csr;
+		assign in_mem_csr_address = VX_csr_w_req.csr_address;
+		assign in_mem_csr_result  = VX_csr_w_req.csr_result;
+
 
 		reg[1024:0][11:0] csr;
 		reg[63:0] cycle;
diff --git a/rtl/VX_memory.v b/rtl/VX_memory.v
index 5bd6a769..d9e01cf6 100644
--- a/rtl/VX_memory.v
+++ b/rtl/VX_memory.v
@@ -14,29 +14,26 @@ module VX_memory (
 		VX_branch_response_inter VX_branch_rsp,
 
 
-		input  wire[31:0]  in_cache_driver_out_data[`NT_M1:0],
-		output wire[31:0] out_cache_driver_in_address[`NT_M1:0],
-		output wire[2:0]  out_cache_driver_in_mem_read,
-		output wire[2:0]  out_cache_driver_in_mem_write,
-		output wire       out_cache_driver_in_valid[`NT_M1:0],
-		output wire[31:0] out_cache_driver_in_data[`NT_M1:0]
+		VX_dcache_response_inter VX_dcache_rsp,
+		VX_dcache_request_inter VX_dcache_req
+
 	);	
 
 
 		 genvar index;
 		 for (index = 0; index <= `NT_M1; index = index + 1) begin
-			assign out_cache_driver_in_address[index]   = VX_mem_req.alu_result[index];
-			assign out_cache_driver_in_data[index]      = VX_mem_req.rd2[index];
-			assign out_cache_driver_in_valid[index]     = VX_mem_req.valid[index];
+			assign VX_dcache_req.out_cache_driver_in_address[index]   = VX_mem_req.alu_result[index];
+			assign VX_dcache_req.out_cache_driver_in_data[index]      = VX_mem_req.rd2[index];
+			assign VX_dcache_req.out_cache_driver_in_valid[index]     = VX_mem_req.valid[index];
 
-			assign VX_mem_wb.mem_result[index]                = in_cache_driver_out_data[index];
+			assign VX_mem_wb.mem_result[index]                = VX_dcache_rsp.in_cache_driver_out_data[index];
 
 		 end
 
 		assign out_delay = 1'b0;
 
-		assign out_cache_driver_in_mem_read  = VX_mem_req.mem_read;
-		assign out_cache_driver_in_mem_write = VX_mem_req.mem_write;
+		assign VX_dcache_req.out_cache_driver_in_mem_read  = VX_mem_req.mem_read;
+		assign VX_dcache_req.out_cache_driver_in_mem_write = VX_mem_req.mem_write;
 
 
 		assign VX_mem_wb.alu_result = VX_mem_req.alu_result;
diff --git a/rtl/Vortex.v b/rtl/Vortex.v
index 39751020..15f64541 100644
--- a/rtl/Vortex.v
+++ b/rtl/Vortex.v
@@ -15,81 +15,63 @@ module Vortex(
 	output wire           out_ebreak
 	);
 
-wire[11:0] decode_csr_address;
-
-// From fetch
-wire           fetch_delay;
-wire           fetch_ebreak;
 
 
-// From execute
-wire            		execute_branch_stall;
-wire[11:0]      		execute_csr_address;
-wire            		execute_is_csr;
-reg[31:0]       		execute_csr_result;
-wire            execute_jal;
-wire[31:0]      execute_jal_dest;
+// Dcache Interface
+
+VX_dcache_response_inter VX_dcache_rsp();
+VX_dcache_request_inter VX_dcache_req();
+
+assign out_cache_driver_in_address   = VX_dcache_req.out_cache_driver_in_address;
+assign out_cache_driver_in_mem_read  = VX_dcache_req.out_cache_driver_in_mem_read;
+assign out_cache_driver_in_mem_write = VX_dcache_req.out_cache_driver_in_mem_write;
+assign out_cache_driver_in_valid     = VX_dcache_req.out_cache_driver_in_valid;
+assign out_cache_driver_in_data      = VX_dcache_req.out_cache_driver_in_data;
+
+assign VX_dcache_rsp.in_cache_driver_out_data = in_cache_driver_out_data;
 
 
-// From e_m_register
-wire            e_m_jal;
-wire[31:0]      e_m_jal_dest;
-wire[11:0]      e_m_csr_address;
-wire            e_m_is_csr;
-wire[31:0]      e_m_csr_result;
-
-
-// From memory
-wire            memory_delay;
-
-// From csr handler
-wire[31:0]    csr_decode_csr_data;
-
-
-// From forwarding
-wire         forwarding_fwd_stall;
-
-
-// Internal
-wire total_freeze;
-
-assign total_freeze = fetch_delay || memory_delay;
-assign out_ebreak   = fetch_ebreak;
-
-
-
-
-VX_inst_meta_inter       fd_inst_meta_de();
-
-VX_frE_to_bckE_req_inter VX_bckE_req();
-
-VX_mem_req_inter         VX_exe_mem_req();
-VX_mem_req_inter         VX_mem_req();
-
-
-VX_inst_mem_wb_inter     VX_mem_wb();
-
-VX_mw_wb_inter           VX_mw_wb();
-
-VX_wb_inter              VX_writeback_inter();
-
-
-VX_forward_reqeust_inter      VX_fwd_req_de();
-VX_forward_exe_inter          VX_fwd_exe();
-VX_forward_mem_inter          VX_fwd_mem();
-VX_forward_wb_inter           VX_fwd_wb();
-VX_forward_response_inter     VX_fwd_rsp();
+// Icache Interface
 
 VX_icache_response_inter icache_response_fe();
 VX_icache_request_inter  icache_request_fe();
 
-
-VX_branch_response_inter VX_branch_rsp();
-VX_jal_response_inter    VX_jal_rsp();
-
 assign icache_response_fe.instruction = icache_response_instruction;
 assign icache_request_pc_address      = icache_request_fe.pc_address;
 
+/////////////////////////////////////////////////////////////////////////
+
+
+
+// Front-end to Back-end
+VX_frE_to_bckE_req_inter      VX_bckE_req(); // New instruction request to EXE/MEM
+wire                          fetch_delay;
+
+
+// Back-end to Front-end
+VX_wb_inter                   VX_writeback_inter(); // Writeback to GPRs
+VX_branch_response_inter      VX_branch_rsp();      // Branch Resolution to Fetch
+VX_jal_response_inter         VX_jal_rsp();         // Jump resolution to Fetch
+wire                          execute_branch_stall;
+wire                          memory_delay;
+
+// Forwarding Buses
+VX_forward_reqeust_inter      VX_fwd_req_de(); // Forward request
+VX_forward_response_inter     VX_fwd_rsp();    // Forward Response
+VX_forward_exe_inter          VX_fwd_exe();    // Data available in EXE
+VX_forward_mem_inter          VX_fwd_mem();    // Data available in MEM
+VX_forward_wb_inter           VX_fwd_wb();     // Data available in WB
+wire                          forwarding_fwd_stall;
+
+
+
+// CSR Buses
+VX_csr_write_request_inter VX_csr_w_req();
+wire[31:0]                 csr_decode_csr_data;
+wire[11:0]                 decode_csr_address;
+
+
+
 
 VX_front_end vx_front_end(
 	.clk                 (clk),
@@ -107,77 +89,27 @@ VX_front_end vx_front_end(
 	.icache_request_fe   (icache_request_fe),
 	.VX_jal_rsp          (VX_jal_rsp),
 	.VX_branch_rsp       (VX_branch_rsp),
-	.fetch_ebreak        (fetch_ebreak)
+	.fetch_ebreak        (out_ebreak)
 	);
 
 
-VX_execute vx_execute(
-		.VX_bckE_req      (VX_bckE_req),
-		.VX_fwd_exe       (VX_fwd_exe),
-		.in_csr_data      (csr_decode_csr_data),
-
-		.VX_exe_mem_req  (VX_exe_mem_req),
-		.out_csr_address  (execute_csr_address),
-		.out_is_csr       (execute_is_csr),
-		.out_csr_result   (execute_csr_result),
-		.out_jal          (execute_jal),
-		.out_jal_dest     (execute_jal_dest),
-		.out_branch_stall (execute_branch_stall)
-	);
-
-
-assign VX_jal_rsp.jal          = e_m_jal;
-assign VX_jal_rsp.jal_dest     = e_m_jal_dest;
-assign VX_jal_rsp.jal_warp_num = VX_mem_req.warp_num;
-
-VX_e_m_reg vx_e_m_reg(
-		.clk              (clk),
-		.reset            (reset),
-		.in_csr_address   (execute_csr_address),
-		.in_is_csr        (execute_is_csr),
-		.in_csr_result    (execute_csr_result),
-		.in_jal           (execute_jal),
-		.in_jal_dest      (execute_jal_dest),
-		.in_freeze        (total_freeze),
-		.VX_exe_mem_req   (VX_exe_mem_req),
-
-		.VX_mem_req       (VX_mem_req),
-		.out_csr_address  (e_m_csr_address),
-		.out_is_csr       (e_m_is_csr),
-		.out_csr_result   (e_m_csr_result),
-		.out_jal          (e_m_jal),
-		.out_jal_dest     (e_m_jal_dest)
-	);
-
-VX_memory vx_memory(
-		.VX_mem_req                   (VX_mem_req),
-		.VX_mem_wb                    (VX_mem_wb),
-		.VX_fwd_mem                   (VX_fwd_mem),
-		.out_delay                    (memory_delay),
-
-		.VX_branch_rsp                (VX_branch_rsp),
-
-		.in_cache_driver_out_data     (in_cache_driver_out_data),
-		.out_cache_driver_in_address  (out_cache_driver_in_address),
-		.out_cache_driver_in_mem_read (out_cache_driver_in_mem_read),
-		.out_cache_driver_in_mem_write(out_cache_driver_in_mem_write),
-		.out_cache_driver_in_data     (out_cache_driver_in_data),
-		.out_cache_driver_in_valid    (out_cache_driver_in_valid)
-	);
-
-VX_m_w_reg vx_m_w_reg(
-		.clk       (clk),
-		.reset     (reset),
-		.in_freeze (total_freeze),
-		.VX_mem_wb (VX_mem_wb),
-		.VX_mw_wb  (VX_mw_wb)
-	);
-
-
-VX_writeback vx_writeback(
-		.VX_mw_wb          (VX_mw_wb),
-		.VX_fwd_wb         (VX_fwd_wb),
-		.VX_writeback_inter(VX_writeback_inter)
+VX_back_end vx_back_end(
+	.clk                 (clk),
+	.reset               (reset),
+	.fetch_delay         (fetch_delay),
+	.VX_bckE_req         (VX_bckE_req),
+	.VX_fwd_exe          (VX_fwd_exe),
+	.csr_decode_csr_data (csr_decode_csr_data),
+	.execute_branch_stall(execute_branch_stall),
+	.VX_jal_rsp          (VX_jal_rsp),
+	.VX_branch_rsp       (VX_branch_rsp),
+	.VX_dcache_rsp       (VX_dcache_rsp),
+	.VX_dcache_req       (VX_dcache_req),
+	.VX_fwd_mem          (VX_fwd_mem),
+	.VX_fwd_wb           (VX_fwd_wb),
+	.VX_csr_w_req        (VX_csr_w_req),
+	.VX_writeback_inter  (VX_writeback_inter),
+	.out_mem_delay       (memory_delay)
 	);
 
 VX_forwarding vx_forwarding(
@@ -192,10 +124,8 @@ VX_forwarding vx_forwarding(
 VX_csr_handler vx_csr_handler(
 		.clk                  (clk),
 		.in_decode_csr_address(decode_csr_address),
-		.in_mem_csr_address   (e_m_csr_address),
-		.in_mem_is_csr        (e_m_is_csr),
-		.in_mem_csr_result    (e_m_csr_result),
-		.in_wb_valid          (VX_mw_wb.valid[0]),
+		.VX_csr_w_req         (VX_csr_w_req),
+		.in_wb_valid          (VX_writeback_inter.wb_valid[0]),
 
 		.out_decode_csr_data  (csr_decode_csr_data)
 	);
diff --git a/rtl/interfaces/._VX_csr_write_request_inter.v b/rtl/interfaces/._VX_csr_write_request_inter.v
new file mode 100644
index 00000000..e28521c3
Binary files /dev/null and b/rtl/interfaces/._VX_csr_write_request_inter.v differ
diff --git a/rtl/interfaces/._VX_dcache_request_inter.v b/rtl/interfaces/._VX_dcache_request_inter.v
new file mode 100644
index 00000000..e28521c3
Binary files /dev/null and b/rtl/interfaces/._VX_dcache_request_inter.v differ
diff --git a/rtl/interfaces/._VX_dcache_response_inter.v b/rtl/interfaces/._VX_dcache_response_inter.v
new file mode 100644
index 00000000..e28521c3
Binary files /dev/null and b/rtl/interfaces/._VX_dcache_response_inter.v differ
diff --git a/rtl/interfaces/VX_csr_write_request_inter.v b/rtl/interfaces/VX_csr_write_request_inter.v
new file mode 100644
index 00000000..169fb5af
--- /dev/null
+++ b/rtl/interfaces/VX_csr_write_request_inter.v
@@ -0,0 +1,35 @@
+
+`include "VX_define.v"
+
+`ifndef VX_CSR_W_REQ
+
+`define VX_CSR_W_REQ
+
+interface VX_csr_write_request_inter ();
+
+		wire        is_csr;
+		wire[11:0]  csr_address;
+		/* verilator lint_off UNUSED */
+		wire[31:0]  csr_result;
+		/* verilator lint_on UNUSED */
+
+	// source-side view
+	modport snk (
+		input is_csr,
+		input csr_address,
+		input csr_result
+	);
+
+
+	// source-side view
+	modport src (
+		output is_csr,
+		output csr_address,
+		output csr_result
+	);
+
+
+endinterface
+
+
+`endif
\ No newline at end of file
diff --git a/rtl/interfaces/VX_dcache_request_inter.v b/rtl/interfaces/VX_dcache_request_inter.v
new file mode 100644
index 00000000..4db90695
--- /dev/null
+++ b/rtl/interfaces/VX_dcache_request_inter.v
@@ -0,0 +1,39 @@
+
+`include "VX_define.v"
+
+`ifndef VX_DCACHE_REQ
+
+`define VX_DCACHE_REQ
+
+interface VX_dcache_request_inter ();
+
+		wire[31:0] out_cache_driver_in_address[`NT_M1:0];
+		wire[2:0]  out_cache_driver_in_mem_read;
+		wire[2:0]  out_cache_driver_in_mem_write;
+		wire       out_cache_driver_in_valid[`NT_M1:0];
+		wire[31:0] out_cache_driver_in_data[`NT_M1:0];
+
+	// source-side view
+	modport snk (
+		input out_cache_driver_in_address,
+		input out_cache_driver_in_mem_read,
+		input out_cache_driver_in_mem_write,
+		input out_cache_driver_in_valid,
+		input out_cache_driver_in_data
+	);
+
+
+	// source-side view
+	modport src (
+		output out_cache_driver_in_address,
+		output out_cache_driver_in_mem_read,
+		output out_cache_driver_in_mem_write,
+		output out_cache_driver_in_valid,
+		output out_cache_driver_in_data
+	);
+
+
+endinterface
+
+
+`endif
\ No newline at end of file
diff --git a/rtl/interfaces/VX_dcache_response_inter.v b/rtl/interfaces/VX_dcache_response_inter.v
new file mode 100644
index 00000000..aaa4c1d5
--- /dev/null
+++ b/rtl/interfaces/VX_dcache_response_inter.v
@@ -0,0 +1,27 @@
+
+`include "VX_define.v"
+
+`ifndef VX_DCACHE_RSP
+
+`define VX_DCACHE_RSP
+
+interface VX_dcache_response_inter ();
+
+		wire[31:0]  in_cache_driver_out_data[`NT_M1:0];
+
+	// source-side view
+	modport snk (
+		input in_cache_driver_out_data
+	);
+
+
+	// source-side view
+	modport src (
+		output in_cache_driver_out_data
+	);
+
+
+endinterface
+
+
+`endif
\ No newline at end of file
diff --git a/rtl/obj_dir/VVortex b/rtl/obj_dir/VVortex
index 0e6771ca..0ab4bf45 100755
Binary files a/rtl/obj_dir/VVortex and b/rtl/obj_dir/VVortex differ
diff --git a/rtl/obj_dir/VVortex.cpp b/rtl/obj_dir/VVortex.cpp
index 95507e9e..9c420e67 100644
--- a/rtl/obj_dir/VVortex.cpp
+++ b/rtl/obj_dir/VVortex.cpp
@@ -17,17 +17,18 @@ VL_ST_SIG8(VVortex::__Vtable1_Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__mu
 VL_CTOR_IMP(VVortex) {
     VVortex__Syms* __restrict vlSymsp = __VlSymsp = new VVortex__Syms(this, name());
     VVortex* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp;
-    VL_CELL(__PVT__Vortex__DOT__fd_inst_meta_de, VVortex_VX_inst_meta_inter);
+    VL_CELL(__PVT__Vortex__DOT__VX_dcache_rsp, VVortex_VX_dcache_response_inter);
+    VL_CELL(__PVT__Vortex__DOT__VX_dcache_req, VVortex_VX_dcache_request_inter);
     VL_CELL(__PVT__Vortex__DOT__VX_bckE_req, VVortex_VX_frE_to_bckE_req_inter);
-    VL_CELL(__PVT__Vortex__DOT__VX_exe_mem_req, VVortex_VX_mem_req_inter);
-    VL_CELL(__PVT__Vortex__DOT__VX_mem_req, VVortex_VX_mem_req_inter);
-    VL_CELL(__PVT__Vortex__DOT__VX_mem_wb, VVortex_VX_inst_mem_wb_inter);
     VL_CELL(__PVT__Vortex__DOT__VX_writeback_inter, VVortex_VX_wb_inter);
     VL_CELL(__PVT__Vortex__DOT__VX_branch_rsp, VVortex_VX_branch_response_inter);
     VL_CELL(__PVT__Vortex__DOT__vx_front_end__DOT__VX_warp_ctl, VVortex_VX_warp_ctl_inter);
     VL_CELL(__PVT__Vortex__DOT__vx_front_end__DOT__fe_inst_meta_fd, VVortex_VX_inst_meta_inter);
     VL_CELL(__PVT__Vortex__DOT__vx_front_end__DOT__VX_frE_to_bckE_req, VVortex_VX_frE_to_bckE_req_inter);
     VL_CELL(__PVT__Vortex__DOT__vx_front_end__DOT__fd_inst_meta_de, VVortex_VX_inst_meta_inter);
+    VL_CELL(__PVT__Vortex__DOT__vx_back_end__DOT__VX_exe_mem_req, VVortex_VX_mem_req_inter);
+    VL_CELL(__PVT__Vortex__DOT__vx_back_end__DOT__VX_mem_req, VVortex_VX_mem_req_inter);
+    VL_CELL(__PVT__Vortex__DOT__vx_back_end__DOT__VX_mem_wb, VVortex_VX_inst_mem_wb_inter);
     // Reset internal values
     
     // Reset structure values
@@ -186,7 +187,7 @@ void VVortex::_initial__TOP__1(VVortex__Syms* __restrict vlSymsp) {
     vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_fetch__DOT__genblk2__BRA__7__KET____DOT__VX_Warp__DOT__valid_zero[3U] = 0U;
     vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_fetch__DOT__genblk2__BRA__7__KET____DOT__VX_Warp__DOT__valid[0U] = 1U;
     vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_fetch__DOT__genblk2__BRA__7__KET____DOT__VX_Warp__DOT__valid_zero[0U] = 0U;
-    // INITIAL at VX_csr_handler.v:27
+    // INITIAL at VX_csr_handler.v:34
     vlTOPp->Vortex__DOT__vx_csr_handler__DOT__cycle = VL_ULL(0);
     vlTOPp->Vortex__DOT__vx_csr_handler__DOT__instret = VL_ULL(0);
     vlTOPp->Vortex__DOT__vx_csr_handler__DOT__decode_csr_address = 0U;
@@ -252,13 +253,13 @@ void VVortex::_settle__TOP__2(VVortex__Syms* __restrict vlSymsp) {
 	= (0xbU & (IData)(vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__jmprt_thread_mask));
     vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__jmprt_thread_mask 
 	= (7U & (IData)(vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__jmprt_thread_mask));
-    vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_cache_driver_out_data[3U] 
+    vlSymsp->TOP__Vortex__DOT__VX_dcache_rsp.in_cache_driver_out_data[3U] 
 	= vlTOPp->in_cache_driver_out_data[3U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_cache_driver_out_data[2U] 
+    vlSymsp->TOP__Vortex__DOT__VX_dcache_rsp.in_cache_driver_out_data[2U] 
 	= vlTOPp->in_cache_driver_out_data[2U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_cache_driver_out_data[1U] 
+    vlSymsp->TOP__Vortex__DOT__VX_dcache_rsp.in_cache_driver_out_data[1U] 
 	= vlTOPp->in_cache_driver_out_data[1U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_cache_driver_out_data[0U] 
+    vlSymsp->TOP__Vortex__DOT__VX_dcache_rsp.in_cache_driver_out_data[0U] 
 	= vlTOPp->in_cache_driver_out_data[0U];
     vlTOPp->Vortex__DOT__execute_branch_stall = (1U 
 						 & ((0U 
@@ -350,7 +351,7 @@ void VVortex::_settle__TOP__2(VVortex__Syms* __restrict vlSymsp) {
 	= ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[1U] 
 	    << 0x18U) | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0U] 
 			 >> 8U));
-    vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2 
+    vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2 
 	= ((0x40U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
 	    ? ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U] 
 		<< 0x1aU) | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[4U] 
@@ -358,7 +359,7 @@ void VVortex::_settle__TOP__2(VVortex__Syms* __restrict vlSymsp) {
 					 << 0x12U) 
 					| (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U] 
 					   >> 0xeU)));
-    vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2 
+    vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2 
 	= ((0x40U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
 	    ? ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U] 
 		<< 0x1aU) | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[4U] 
@@ -366,7 +367,7 @@ void VVortex::_settle__TOP__2(VVortex__Syms* __restrict vlSymsp) {
 					 << 0x12U) 
 					| (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[6U] 
 					   >> 0xeU)));
-    vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2 
+    vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2 
 	= ((0x40U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
 	    ? ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U] 
 		<< 0x1aU) | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[4U] 
@@ -374,7 +375,7 @@ void VVortex::_settle__TOP__2(VVortex__Syms* __restrict vlSymsp) {
 					 << 0x12U) 
 					| (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[7U] 
 					   >> 0xeU)));
-    vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2 
+    vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2 
 	= ((0x40U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
 	    ? ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U] 
 		<< 0x1aU) | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[4U] 
@@ -382,10 +383,10 @@ void VVortex::_settle__TOP__2(VVortex__Syms* __restrict vlSymsp) {
 					 << 0x12U) 
 					| (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[8U] 
 					   >> 0xeU)));
-    vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.wb = 
-	(3U & ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[6U] 
-		<< 0x19U) | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U] 
-			     >> 7U)));
+    vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_exe_mem_req.wb 
+	= (3U & ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[6U] 
+		  << 0x19U) | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U] 
+			       >> 7U)));
     vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__VX_Context_zero__DOT__rd1_register[0U] 
 	= vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__VX_Context_zero__DOT____Vcellout__vx_register_file_master__out_src1_data;
     vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__VX_Context_zero__DOT__rd1_register[1U] 
@@ -542,138 +543,138 @@ void VVortex::_settle__TOP__2(VVortex__Syms* __restrict vlSymsp) {
 	   & (5U == (7U & ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] 
 			    << 0xcU) | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] 
 					>> 0x14U)))));
-    vlTOPp->Vortex__DOT__vx_writeback__DOT__out_pc_data[0U] 
-	= ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
-	    << 0x18U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] 
+    vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_writeback__DOT__out_pc_data[0U] 
+	= ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+	    << 0x18U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] 
 			 >> 8U));
-    vlTOPp->Vortex__DOT__vx_writeback__DOT__out_pc_data[1U] 
-	= ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
-	    << 0x18U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] 
+    vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_writeback__DOT__out_pc_data[1U] 
+	= ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+	    << 0x18U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] 
 			 >> 8U));
-    vlTOPp->Vortex__DOT__vx_writeback__DOT__out_pc_data[2U] 
-	= ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
-	    << 0x18U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] 
+    vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_writeback__DOT__out_pc_data[2U] 
+	= ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+	    << 0x18U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] 
 			 >> 8U));
-    vlTOPp->Vortex__DOT__vx_writeback__DOT__out_pc_data[3U] 
-	= ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
-	    << 0x18U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] 
+    vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_writeback__DOT__out_pc_data[3U] 
+	= ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+	    << 0x18U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] 
 			 >> 8U));
     vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next[0U] 
-	= ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
-	    << 0x18U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] 
+	= ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+	    << 0x18U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] 
 			 >> 8U));
     vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next[1U] 
-	= ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
-	    << 0x18U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] 
+	= ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+	    << 0x18U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] 
 			 >> 8U));
     vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next[2U] 
-	= ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
-	    << 0x18U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] 
+	= ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+	    << 0x18U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] 
 			 >> 8U));
     vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next[3U] 
-	= ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
-	    << 0x18U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] 
+	= ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+	    << 0x18U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] 
 			 >> 8U));
     vlTOPp->out_cache_driver_in_mem_read = (7U & ((
-						   vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
+						   vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
 						   << 1U) 
-						  | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] 
+						  | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] 
 						     >> 0x1fU)));
     vlTOPp->out_cache_driver_in_mem_write = (7U & (
-						   (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
+						   (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
 						    << 4U) 
-						   | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] 
+						   | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] 
 						      >> 0x1cU)));
-    vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_address[0U] 
-	= ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[9U] 
-	    << 0x1eU) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
+    vlSymsp->TOP__Vortex__DOT__VX_dcache_req.out_cache_driver_in_address[0U] 
+	= ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[9U] 
+	    << 0x1eU) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
 			 >> 2U));
-    vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_data[0U] 
-	= ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[4U] 
-	    << 0x15U) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[3U] 
+    vlSymsp->TOP__Vortex__DOT__VX_dcache_req.out_cache_driver_in_data[0U] 
+	= ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[4U] 
+	    << 0x15U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[3U] 
 			 >> 0xbU));
-    vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_valid[0U] 
-	= (1U & (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U] 
+    vlSymsp->TOP__Vortex__DOT__VX_dcache_req.out_cache_driver_in_valid[0U] 
+	= (1U & (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U] 
 		 >> 4U));
-    vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_address[1U] 
-	= ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xaU] 
-	    << 0x1eU) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[9U] 
+    vlSymsp->TOP__Vortex__DOT__VX_dcache_req.out_cache_driver_in_address[1U] 
+	= ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xaU] 
+	    << 0x1eU) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[9U] 
 			 >> 2U));
-    vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_data[1U] 
-	= ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[5U] 
-	    << 0x15U) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[4U] 
+    vlSymsp->TOP__Vortex__DOT__VX_dcache_req.out_cache_driver_in_data[1U] 
+	= ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[5U] 
+	    << 0x15U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[4U] 
 			 >> 0xbU));
-    vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_valid[1U] 
-	= (1U & (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U] 
+    vlSymsp->TOP__Vortex__DOT__VX_dcache_req.out_cache_driver_in_valid[1U] 
+	= (1U & (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U] 
 		 >> 5U));
-    vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_address[2U] 
-	= ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xbU] 
-	    << 0x1eU) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xaU] 
+    vlSymsp->TOP__Vortex__DOT__VX_dcache_req.out_cache_driver_in_address[2U] 
+	= ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xbU] 
+	    << 0x1eU) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xaU] 
 			 >> 2U));
-    vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_data[2U] 
-	= ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[6U] 
-	    << 0x15U) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[5U] 
+    vlSymsp->TOP__Vortex__DOT__VX_dcache_req.out_cache_driver_in_data[2U] 
+	= ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[6U] 
+	    << 0x15U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[5U] 
 			 >> 0xbU));
-    vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_valid[2U] 
-	= (1U & (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U] 
+    vlSymsp->TOP__Vortex__DOT__VX_dcache_req.out_cache_driver_in_valid[2U] 
+	= (1U & (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U] 
 		 >> 6U));
-    vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_address[3U] 
-	= ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xcU] 
-	    << 0x1eU) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xbU] 
+    vlSymsp->TOP__Vortex__DOT__VX_dcache_req.out_cache_driver_in_address[3U] 
+	= ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xcU] 
+	    << 0x1eU) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xbU] 
 			 >> 2U));
-    vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_data[3U] 
-	= ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] 
-	    << 0x15U) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[6U] 
+    vlSymsp->TOP__Vortex__DOT__VX_dcache_req.out_cache_driver_in_data[3U] 
+	= ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] 
+	    << 0x15U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[6U] 
 			 >> 0xbU));
-    vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_valid[3U] 
-	= (1U & (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U] 
+    vlSymsp->TOP__Vortex__DOT__VX_dcache_req.out_cache_driver_in_valid[3U] 
+	= (1U & (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U] 
 		 >> 7U));
     vlSymsp->TOP__Vortex__DOT__VX_branch_rsp.branch_dest 
-	= (((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[2U] 
-	     << 0x15U) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[1U] 
-			  >> 0xbU)) + ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[1U] 
+	= (((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[2U] 
+	     << 0x15U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[1U] 
+			  >> 0xbU)) + ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[1U] 
 					<< 0x16U) | 
 				       (0x3ffffeU & 
-					(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U] 
+					(vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U] 
 					 >> 0xaU))));
-    // ALWAYS at VX_memory.v:62
-    vlTOPp->Vortex__DOT__vx_memory__DOT__temp_branch_dir 
-	= (1U & ((0x400U & vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])
-		  ? ((0x200U & vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])
-		      ? ((~ (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U] 
-			     >> 8U)) & (~ (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[9U] 
+    // ALWAYS at VX_memory.v:59
+    vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_memory__DOT__temp_branch_dir 
+	= (1U & ((0x400U & vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])
+		  ? ((0x200U & vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])
+		      ? ((~ (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U] 
+			     >> 8U)) & (~ (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[9U] 
 					   >> 1U)))
-		      : ((0x100U & vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])
-			  ? (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[9U] 
-			     >> 1U) : (~ (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[9U] 
+		      : ((0x100U & vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])
+			  ? (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[9U] 
+			     >> 1U) : (~ (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[9U] 
 					  >> 1U))))
-		  : ((0x200U & vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])
-		      ? ((0x100U & vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])
-			  ? (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[9U] 
-			     >> 1U) : (0U != ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[9U] 
+		  : ((0x200U & vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])
+		      ? ((0x100U & vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])
+			  ? (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[9U] 
+			     >> 1U) : (0U != ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[9U] 
 					       << 0x1eU) 
-					      | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
+					      | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
 						 >> 2U))))
-		      : ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U] 
-			  >> 8U) & (0U == ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[9U] 
+		      : ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U] 
+			  >> 8U) & (0U == ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[9U] 
 					    << 0x1eU) 
-					   | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
+					   | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
 					      >> 2U)))))));
     vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next[0U] 
-	= ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[3U] 
-	    << 0x15U) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[2U] 
+	= ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[3U] 
+	    << 0x15U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[2U] 
 			 >> 0xbU));
     vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next[1U] 
-	= ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[3U] 
-	    << 0x15U) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[2U] 
+	= ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[3U] 
+	    << 0x15U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[2U] 
 			 >> 0xbU));
     vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next[2U] 
-	= ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[3U] 
-	    << 0x15U) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[2U] 
+	= ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[3U] 
+	    << 0x15U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[2U] 
 			 >> 0xbU));
     vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next[3U] 
-	= ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[3U] 
-	    << 0x15U) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[2U] 
+	= ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[3U] 
+	    << 0x15U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[2U] 
 			 >> 0xbU));
     vlTOPp->Vortex__DOT__csr_decode_csr_data = ((0xc00U 
 						 == (IData)(vlTOPp->Vortex__DOT__vx_csr_handler__DOT__decode_csr_address))
@@ -695,46 +696,46 @@ void VVortex::_settle__TOP__2(VVortex__Syms* __restrict vlSymsp) {
 							      (vlTOPp->Vortex__DOT__vx_csr_handler__DOT__instret 
 							       >> 0x20U))
 						    : (IData)(vlTOPp->Vortex__DOT__vx_csr_handler__DOT__data_read)))));
-    vlSymsp->TOP__Vortex__DOT__VX_mem_wb.mem_result[0U] 
-	= vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_cache_driver_out_data
+    vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_mem_wb.mem_result[0U] 
+	= vlSymsp->TOP__Vortex__DOT__VX_dcache_rsp.in_cache_driver_out_data
 	[0U];
-    vlSymsp->TOP__Vortex__DOT__VX_mem_wb.mem_result[1U] 
-	= vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_cache_driver_out_data
+    vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_mem_wb.mem_result[1U] 
+	= vlSymsp->TOP__Vortex__DOT__VX_dcache_rsp.in_cache_driver_out_data
 	[1U];
-    vlSymsp->TOP__Vortex__DOT__VX_mem_wb.mem_result[2U] 
-	= vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_cache_driver_out_data
+    vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_mem_wb.mem_result[2U] 
+	= vlSymsp->TOP__Vortex__DOT__VX_dcache_rsp.in_cache_driver_out_data
 	[2U];
-    vlSymsp->TOP__Vortex__DOT__VX_mem_wb.mem_result[3U] 
-	= vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_cache_driver_out_data
+    vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_mem_wb.mem_result[3U] 
+	= vlSymsp->TOP__Vortex__DOT__VX_dcache_rsp.in_cache_driver_out_data
 	[3U];
-    vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__mult_signed_result 
+    vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__mult_signed_result 
 	= VL_MULS_QQQ(64,64,64, VL_EXTENDS_QI(64,32, 
 					      ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] 
 						<< 0x12U) 
 					       | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[9U] 
 						  >> 0xeU))), 
-		      VL_EXTENDS_QI(64,32, vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2));
-    vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__mult_signed_result 
+		      VL_EXTENDS_QI(64,32, vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2));
+    vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__mult_signed_result 
 	= VL_MULS_QQQ(64,64,64, VL_EXTENDS_QI(64,32, 
 					      ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] 
 						<< 0x12U) 
 					       | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] 
 						  >> 0xeU))), 
-		      VL_EXTENDS_QI(64,32, vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2));
-    vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__mult_signed_result 
+		      VL_EXTENDS_QI(64,32, vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2));
+    vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__mult_signed_result 
 	= VL_MULS_QQQ(64,64,64, VL_EXTENDS_QI(64,32, 
 					      ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] 
 						<< 0x12U) 
 					       | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] 
 						  >> 0xeU))), 
-		      VL_EXTENDS_QI(64,32, vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2));
-    vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__mult_signed_result 
+		      VL_EXTENDS_QI(64,32, vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2));
+    vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__mult_signed_result 
 	= VL_MULS_QQQ(64,64,64, VL_EXTENDS_QI(64,32, 
 					      ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xdU] 
 						<< 0x12U) 
 					       | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] 
 						  >> 0xeU))), 
-		      VL_EXTENDS_QI(64,32, vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2));
+		      VL_EXTENDS_QI(64,32, vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2));
     vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_exe_fwd 
 	= (((((0x1fU & ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] 
 			 << 9U) | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] 
@@ -746,7 +747,7 @@ void VVortex::_settle__TOP__2(VVortex__Syms* __restrict vlSymsp) {
 	     & (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] 
 				 << 9U) | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] 
 					   >> 0x17U))))) 
-	    & (0U != (IData)(vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.wb))) 
+	    & (0U != (IData)(vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_exe_mem_req.wb))) 
 	   & ((0xfU & ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] 
 			<< 0x1cU) | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] 
 				     >> 4U))) == (0xfU 
@@ -762,7 +763,7 @@ void VVortex::_settle__TOP__2(VVortex__Syms* __restrict vlSymsp) {
 	     & (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] 
 				 << 4U) | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] 
 					   >> 0x1cU))))) 
-	    & (0U != (IData)(vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.wb))) 
+	    & (0U != (IData)(vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_exe_mem_req.wb))) 
 	   & ((0xfU & ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] 
 			<< 0x1cU) | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] 
 				     >> 4U))) == (0xfU 
@@ -1223,181 +1224,181 @@ void VVortex::_settle__TOP__2(VVortex__Syms* __restrict vlSymsp) {
 			      << 0x1cU) | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] 
 					   >> 4U)))));
     vlSymsp->TOP__Vortex__DOT__VX_writeback_inter.write_data[0U] 
-	= ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
-			  << 0x18U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+	= ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			  << 0x18U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 				       >> 8U)))) ? 
-	   vlTOPp->Vortex__DOT__vx_writeback__DOT__out_pc_data[0U]
-	    : ((1U == (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
-			      << 0x18U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+	   vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_writeback__DOT__out_pc_data[0U]
+	    : ((1U == (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			      << 0x18U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					   >> 8U))))
-	        ? ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[6U] 
-		    << 0x11U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[5U] 
-				 >> 0xfU)) : ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+	        ? ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[6U] 
+		    << 0x11U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[5U] 
+				 >> 0xfU)) : ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
 					       << 0x11U) 
-					      | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+					      | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 						 >> 0xfU))));
     vlSymsp->TOP__Vortex__DOT__VX_writeback_inter.write_data[1U] 
-	= ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
-			  << 0x18U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+	= ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			  << 0x18U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 				       >> 8U)))) ? 
-	   vlTOPp->Vortex__DOT__vx_writeback__DOT__out_pc_data[1U]
-	    : ((1U == (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
-			      << 0x18U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+	   vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_writeback__DOT__out_pc_data[1U]
+	    : ((1U == (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			      << 0x18U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					   >> 8U))))
-	        ? ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[7U] 
-		    << 0x11U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[6U] 
-				 >> 0xfU)) : ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[3U] 
+	        ? ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[7U] 
+		    << 0x11U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[6U] 
+				 >> 0xfU)) : ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[3U] 
 					       << 0x11U) 
-					      | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+					      | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
 						 >> 0xfU))));
     vlSymsp->TOP__Vortex__DOT__VX_writeback_inter.write_data[2U] 
-	= ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
-			  << 0x18U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+	= ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			  << 0x18U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 				       >> 8U)))) ? 
-	   vlTOPp->Vortex__DOT__vx_writeback__DOT__out_pc_data[2U]
-	    : ((1U == (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
-			      << 0x18U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+	   vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_writeback__DOT__out_pc_data[2U]
+	    : ((1U == (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			      << 0x18U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					   >> 8U))))
-	        ? ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[8U] 
-		    << 0x11U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[7U] 
-				 >> 0xfU)) : ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[4U] 
+	        ? ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[8U] 
+		    << 0x11U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[7U] 
+				 >> 0xfU)) : ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[4U] 
 					       << 0x11U) 
-					      | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[3U] 
+					      | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[3U] 
 						 >> 0xfU))));
     vlSymsp->TOP__Vortex__DOT__VX_writeback_inter.write_data[3U] 
-	= ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
-			  << 0x18U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+	= ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			  << 0x18U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 				       >> 8U)))) ? 
-	   vlTOPp->Vortex__DOT__vx_writeback__DOT__out_pc_data[3U]
-	    : ((1U == (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
-			      << 0x18U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+	   vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_writeback__DOT__out_pc_data[3U]
+	    : ((1U == (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			      << 0x18U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					   >> 8U))))
-	        ? ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[9U] 
-		    << 0x11U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[8U] 
-				 >> 0xfU)) : ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[5U] 
+	        ? ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[9U] 
+		    << 0x11U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[8U] 
+				 >> 0xfU)) : ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[5U] 
 					       << 0x11U) 
-					      | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[4U] 
+					      | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[4U] 
 						 >> 0xfU))));
-    vlTOPp->out_cache_driver_in_address[3U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_address
+    vlTOPp->out_cache_driver_in_address[3U] = vlSymsp->TOP__Vortex__DOT__VX_dcache_req.out_cache_driver_in_address
 	[3U];
-    vlTOPp->out_cache_driver_in_address[2U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_address
+    vlTOPp->out_cache_driver_in_address[2U] = vlSymsp->TOP__Vortex__DOT__VX_dcache_req.out_cache_driver_in_address
 	[2U];
-    vlTOPp->out_cache_driver_in_address[1U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_address
+    vlTOPp->out_cache_driver_in_address[1U] = vlSymsp->TOP__Vortex__DOT__VX_dcache_req.out_cache_driver_in_address
 	[1U];
-    vlTOPp->out_cache_driver_in_address[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_address
+    vlTOPp->out_cache_driver_in_address[0U] = vlSymsp->TOP__Vortex__DOT__VX_dcache_req.out_cache_driver_in_address
 	[0U];
-    vlTOPp->out_cache_driver_in_data[3U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_data
+    vlTOPp->out_cache_driver_in_data[3U] = vlSymsp->TOP__Vortex__DOT__VX_dcache_req.out_cache_driver_in_data
 	[3U];
-    vlTOPp->out_cache_driver_in_data[2U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_data
+    vlTOPp->out_cache_driver_in_data[2U] = vlSymsp->TOP__Vortex__DOT__VX_dcache_req.out_cache_driver_in_data
 	[2U];
-    vlTOPp->out_cache_driver_in_data[1U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_data
+    vlTOPp->out_cache_driver_in_data[1U] = vlSymsp->TOP__Vortex__DOT__VX_dcache_req.out_cache_driver_in_data
 	[1U];
-    vlTOPp->out_cache_driver_in_data[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_data
+    vlTOPp->out_cache_driver_in_data[0U] = vlSymsp->TOP__Vortex__DOT__VX_dcache_req.out_cache_driver_in_data
 	[0U];
-    vlTOPp->out_cache_driver_in_valid[3U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_valid
+    vlTOPp->out_cache_driver_in_valid[3U] = vlSymsp->TOP__Vortex__DOT__VX_dcache_req.out_cache_driver_in_valid
 	[3U];
-    vlTOPp->out_cache_driver_in_valid[2U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_valid
+    vlTOPp->out_cache_driver_in_valid[2U] = vlSymsp->TOP__Vortex__DOT__VX_dcache_req.out_cache_driver_in_valid
 	[2U];
-    vlTOPp->out_cache_driver_in_valid[1U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_valid
+    vlTOPp->out_cache_driver_in_valid[1U] = vlSymsp->TOP__Vortex__DOT__VX_dcache_req.out_cache_driver_in_valid
 	[1U];
-    vlTOPp->out_cache_driver_in_valid[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_valid
+    vlTOPp->out_cache_driver_in_valid[0U] = vlSymsp->TOP__Vortex__DOT__VX_dcache_req.out_cache_driver_in_valid
 	[0U];
     // ALWAYS at VX_warp.v:57
     vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_fetch__DOT__genblk2__BRA__0__KET____DOT__VX_Warp__DOT__temp_PC 
-	= (((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xdU] 
-	     >> 2U) & (0U == (0xfU & vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])))
-	    ? ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xdU] 
-		<< 0x1eU) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xcU] 
-			     >> 2U)) : (((IData)(vlTOPp->Vortex__DOT__vx_memory__DOT__temp_branch_dir) 
+	= (((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xdU] 
+	     >> 2U) & (0U == (0xfU & vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])))
+	    ? ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xdU] 
+		<< 0x1eU) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xcU] 
+			     >> 2U)) : (((IData)(vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_memory__DOT__temp_branch_dir) 
 					 & (0U == (0xfU 
-						   & vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])))
+						   & vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])))
 					 ? vlSymsp->TOP__Vortex__DOT__VX_branch_rsp.branch_dest
 					 : vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_fetch__DOT__genblk2__BRA__0__KET____DOT__VX_Warp__DOT__real_PC));
     // ALWAYS at VX_warp.v:57
     vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_fetch__DOT__genblk2__BRA__1__KET____DOT__VX_Warp__DOT__temp_PC 
-	= (((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xdU] 
-	     >> 2U) & (1U == (0xfU & vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])))
-	    ? ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xdU] 
-		<< 0x1eU) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xcU] 
-			     >> 2U)) : (((IData)(vlTOPp->Vortex__DOT__vx_memory__DOT__temp_branch_dir) 
+	= (((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xdU] 
+	     >> 2U) & (1U == (0xfU & vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])))
+	    ? ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xdU] 
+		<< 0x1eU) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xcU] 
+			     >> 2U)) : (((IData)(vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_memory__DOT__temp_branch_dir) 
 					 & (1U == (0xfU 
-						   & vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])))
+						   & vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])))
 					 ? vlSymsp->TOP__Vortex__DOT__VX_branch_rsp.branch_dest
 					 : vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_fetch__DOT__genblk2__BRA__1__KET____DOT__VX_Warp__DOT__real_PC));
     // ALWAYS at VX_warp.v:57
     vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_fetch__DOT__genblk2__BRA__2__KET____DOT__VX_Warp__DOT__temp_PC 
-	= (((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xdU] 
-	     >> 2U) & (2U == (0xfU & vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])))
-	    ? ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xdU] 
-		<< 0x1eU) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xcU] 
-			     >> 2U)) : (((IData)(vlTOPp->Vortex__DOT__vx_memory__DOT__temp_branch_dir) 
+	= (((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xdU] 
+	     >> 2U) & (2U == (0xfU & vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])))
+	    ? ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xdU] 
+		<< 0x1eU) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xcU] 
+			     >> 2U)) : (((IData)(vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_memory__DOT__temp_branch_dir) 
 					 & (2U == (0xfU 
-						   & vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])))
+						   & vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])))
 					 ? vlSymsp->TOP__Vortex__DOT__VX_branch_rsp.branch_dest
 					 : vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_fetch__DOT__genblk2__BRA__2__KET____DOT__VX_Warp__DOT__real_PC));
     // ALWAYS at VX_warp.v:57
     vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_fetch__DOT__genblk2__BRA__3__KET____DOT__VX_Warp__DOT__temp_PC 
-	= (((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xdU] 
-	     >> 2U) & (3U == (0xfU & vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])))
-	    ? ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xdU] 
-		<< 0x1eU) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xcU] 
-			     >> 2U)) : (((IData)(vlTOPp->Vortex__DOT__vx_memory__DOT__temp_branch_dir) 
+	= (((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xdU] 
+	     >> 2U) & (3U == (0xfU & vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])))
+	    ? ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xdU] 
+		<< 0x1eU) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xcU] 
+			     >> 2U)) : (((IData)(vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_memory__DOT__temp_branch_dir) 
 					 & (3U == (0xfU 
-						   & vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])))
+						   & vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])))
 					 ? vlSymsp->TOP__Vortex__DOT__VX_branch_rsp.branch_dest
 					 : vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_fetch__DOT__genblk2__BRA__3__KET____DOT__VX_Warp__DOT__real_PC));
     // ALWAYS at VX_warp.v:57
     vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_fetch__DOT__genblk2__BRA__4__KET____DOT__VX_Warp__DOT__temp_PC 
-	= (((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xdU] 
-	     >> 2U) & (4U == (0xfU & vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])))
-	    ? ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xdU] 
-		<< 0x1eU) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xcU] 
-			     >> 2U)) : (((IData)(vlTOPp->Vortex__DOT__vx_memory__DOT__temp_branch_dir) 
+	= (((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xdU] 
+	     >> 2U) & (4U == (0xfU & vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])))
+	    ? ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xdU] 
+		<< 0x1eU) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xcU] 
+			     >> 2U)) : (((IData)(vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_memory__DOT__temp_branch_dir) 
 					 & (4U == (0xfU 
-						   & vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])))
+						   & vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])))
 					 ? vlSymsp->TOP__Vortex__DOT__VX_branch_rsp.branch_dest
 					 : vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_fetch__DOT__genblk2__BRA__4__KET____DOT__VX_Warp__DOT__real_PC));
     // ALWAYS at VX_warp.v:57
     vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_fetch__DOT__genblk2__BRA__5__KET____DOT__VX_Warp__DOT__temp_PC 
-	= (((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xdU] 
-	     >> 2U) & (5U == (0xfU & vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])))
-	    ? ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xdU] 
-		<< 0x1eU) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xcU] 
-			     >> 2U)) : (((IData)(vlTOPp->Vortex__DOT__vx_memory__DOT__temp_branch_dir) 
+	= (((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xdU] 
+	     >> 2U) & (5U == (0xfU & vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])))
+	    ? ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xdU] 
+		<< 0x1eU) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xcU] 
+			     >> 2U)) : (((IData)(vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_memory__DOT__temp_branch_dir) 
 					 & (5U == (0xfU 
-						   & vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])))
+						   & vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])))
 					 ? vlSymsp->TOP__Vortex__DOT__VX_branch_rsp.branch_dest
 					 : vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_fetch__DOT__genblk2__BRA__5__KET____DOT__VX_Warp__DOT__real_PC));
     // ALWAYS at VX_warp.v:57
     vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_fetch__DOT__genblk2__BRA__6__KET____DOT__VX_Warp__DOT__temp_PC 
-	= (((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xdU] 
-	     >> 2U) & (6U == (0xfU & vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])))
-	    ? ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xdU] 
-		<< 0x1eU) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xcU] 
-			     >> 2U)) : (((IData)(vlTOPp->Vortex__DOT__vx_memory__DOT__temp_branch_dir) 
+	= (((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xdU] 
+	     >> 2U) & (6U == (0xfU & vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])))
+	    ? ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xdU] 
+		<< 0x1eU) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xcU] 
+			     >> 2U)) : (((IData)(vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_memory__DOT__temp_branch_dir) 
 					 & (6U == (0xfU 
-						   & vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])))
+						   & vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])))
 					 ? vlSymsp->TOP__Vortex__DOT__VX_branch_rsp.branch_dest
 					 : vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_fetch__DOT__genblk2__BRA__6__KET____DOT__VX_Warp__DOT__real_PC));
     // ALWAYS at VX_warp.v:57
     vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_fetch__DOT__genblk2__BRA__7__KET____DOT__VX_Warp__DOT__temp_PC 
-	= (((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xdU] 
-	     >> 2U) & (7U == (0xfU & vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])))
-	    ? ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xdU] 
-		<< 0x1eU) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xcU] 
-			     >> 2U)) : (((IData)(vlTOPp->Vortex__DOT__vx_memory__DOT__temp_branch_dir) 
+	= (((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xdU] 
+	     >> 2U) & (7U == (0xfU & vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])))
+	    ? ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xdU] 
+		<< 0x1eU) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xcU] 
+			     >> 2U)) : (((IData)(vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_memory__DOT__temp_branch_dir) 
 					 & (7U == (0xfU 
-						   & vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])))
+						   & vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])))
 					 ? vlSymsp->TOP__Vortex__DOT__VX_branch_rsp.branch_dest
 					 : vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_fetch__DOT__genblk2__BRA__7__KET____DOT__VX_Warp__DOT__real_PC));
     // ALWAYS at VX_alu.v:48
-    vlTOPp->Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__0__KET____DOT__vx_alu__out_alu_result 
+    vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__0__KET____DOT__vx_alu__out_alu_result 
 	= ((0x2000U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
 	    ? ((0x1000U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
 	        ? 0U : ((0x800U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
 			 ? ((0x400U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
 			     ? ((0x200U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
-				 ? ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2)
+				 ? ((0U == vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2)
 				     ? ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] 
 					 << 0x12U) 
 					| (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[9U] 
@@ -1406,8 +1407,8 @@ void VVortex::_settle__TOP__2(VVortex__Syms* __restrict vlSymsp) {
 						     ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] 
 						       << 0x12U) 
 						      | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[9U] 
-							 >> 0xeU)), vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2))
-				 : ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2)
+							 >> 0xeU)), vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2))
+				 : ((0U == vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2)
 				     ? ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] 
 					 << 0x12U) 
 					| (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[9U] 
@@ -1416,22 +1417,22 @@ void VVortex::_settle__TOP__2(VVortex__Syms* __restrict vlSymsp) {
 						      ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] 
 							<< 0x12U) 
 						       | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[9U] 
-							  >> 0xeU)), vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2)))
+							  >> 0xeU)), vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2)))
 			     : ((0x200U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
-				 ? ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2)
+				 ? ((0U == vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2)
 				     ? 0xffffffffU : 
 				    VL_DIV_III(32, 
 					       ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] 
 						 << 0x12U) 
 						| (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[9U] 
-						   >> 0xeU)), vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2))
-				 : ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2)
+						   >> 0xeU)), vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2))
+				 : ((0U == vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2)
 				     ? 0xffffffffU : 
 				    VL_DIVS_III(32, 
 						((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] 
 						  << 0x12U) 
 						 | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[9U] 
-						    >> 0xeU)), vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2))))
+						    >> 0xeU)), vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2))))
 			 : ((0x400U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
 			     ? ((0x200U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
 				 ? (IData)((((QData)((IData)(
@@ -1439,7 +1440,7 @@ void VVortex::_settle__TOP__2(VVortex__Syms* __restrict vlSymsp) {
 							       << 0x12U) 
 							      | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[9U] 
 								 >> 0xeU)))) 
-					     * (QData)((IData)(vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2))) 
+					     * (QData)((IData)(vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2))) 
 					    >> 0x20U))
 				 : (IData)((((((QData)((IData)(
 							       VL_NEGATE_I((IData)(
@@ -1452,12 +1453,12 @@ void VVortex::_settle__TOP__2(VVortex__Syms* __restrict vlSymsp) {
 								  << 0x12U) 
 								 | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[9U] 
 								    >> 0xeU))))) 
-					     * (QData)((IData)(vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2))) 
+					     * (QData)((IData)(vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2))) 
 					    >> 0x20U)))
 			     : ((0x200U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
-				 ? (IData)((vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__mult_signed_result 
+				 ? (IData)((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__mult_signed_result 
 					    >> 0x20U))
-				 : (IData)(vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__mult_signed_result)))))
+				 : (IData)(vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__mult_signed_result)))))
 	    : ((0x1000U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
 	        ? ((0x800U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
 		    ? ((0x400U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
@@ -1476,17 +1477,17 @@ void VVortex::_settle__TOP__2(VVortex__Syms* __restrict vlSymsp) {
 			    : ((((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] 
 				  << 0x12U) | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[9U] 
 					       >> 0xeU)) 
-				>= vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2)
+				>= vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2)
 			        ? 0U : 0xffffffffU))
 		        : ((0x200U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
-			    ? (vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2 
+			    ? (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2 
 			       & ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] 
 				   << 0x12U) | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[9U] 
 						>> 0xeU)))
 			    : (((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] 
 				 << 0x12U) | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[9U] 
 					      >> 0xeU)) 
-			       | vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2))))
+			       | vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2))))
 	        : ((0x800U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
 		    ? ((0x400U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
 		        ? ((0x200U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
@@ -1496,20 +1497,20 @@ void VVortex::_settle__TOP__2(VVortex__Syms* __restrict vlSymsp) {
 					      | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[9U] 
 						 >> 0xeU)), 
 					     (0x1fU 
-					      & vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2))
+					      & vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2))
 			    : (((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] 
 				 << 0x12U) | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[9U] 
 					      >> 0xeU)) 
-			       >> (0x1fU & vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2)))
+			       >> (0x1fU & vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2)))
 		        : ((0x200U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
 			    ? (((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] 
 				 << 0x12U) | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[9U] 
 					      >> 0xeU)) 
-			       ^ vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2)
+			       ^ vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2)
 			    : ((((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] 
 				  << 0x12U) | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[9U] 
 					       >> 0xeU)) 
-				< vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2)
+				< vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2)
 			        ? 1U : 0U))) : ((0x400U 
 						 & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
 						 ? 
@@ -1520,7 +1521,7 @@ void VVortex::_settle__TOP__2(VVortex__Syms* __restrict vlSymsp) {
 							     ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] 
 							       << 0x12U) 
 							      | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[9U] 
-								 >> 0xeU)), vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2)
+								 >> 0xeU)), vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2)
 						   ? 1U
 						   : 0U)
 						  : 
@@ -1530,7 +1531,7 @@ void VVortex::_settle__TOP__2(VVortex__Syms* __restrict vlSymsp) {
 						      >> 0xeU)) 
 						  << 
 						  (0x1fU 
-						   & vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2)))
+						   & vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2)))
 						 : 
 						((0x200U 
 						  & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
@@ -1539,21 +1540,21 @@ void VVortex::_settle__TOP__2(VVortex__Syms* __restrict vlSymsp) {
 						    << 0x12U) 
 						   | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[9U] 
 						      >> 0xeU)) 
-						  - vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2)
+						  - vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2)
 						  : 
 						 (((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] 
 						    << 0x12U) 
 						   | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[9U] 
 						      >> 0xeU)) 
-						  + vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2))))));
+						  + vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2))))));
     // ALWAYS at VX_alu.v:48
-    vlTOPp->Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__1__KET____DOT__vx_alu__out_alu_result 
+    vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__1__KET____DOT__vx_alu__out_alu_result 
 	= ((0x2000U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
 	    ? ((0x1000U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
 	        ? 0U : ((0x800U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
 			 ? ((0x400U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
 			     ? ((0x200U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
-				 ? ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2)
+				 ? ((0U == vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2)
 				     ? ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] 
 					 << 0x12U) 
 					| (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] 
@@ -1562,8 +1563,8 @@ void VVortex::_settle__TOP__2(VVortex__Syms* __restrict vlSymsp) {
 						     ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] 
 						       << 0x12U) 
 						      | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] 
-							 >> 0xeU)), vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2))
-				 : ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2)
+							 >> 0xeU)), vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2))
+				 : ((0U == vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2)
 				     ? ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] 
 					 << 0x12U) 
 					| (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] 
@@ -1572,22 +1573,22 @@ void VVortex::_settle__TOP__2(VVortex__Syms* __restrict vlSymsp) {
 						      ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] 
 							<< 0x12U) 
 						       | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] 
-							  >> 0xeU)), vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2)))
+							  >> 0xeU)), vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2)))
 			     : ((0x200U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
-				 ? ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2)
+				 ? ((0U == vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2)
 				     ? 0xffffffffU : 
 				    VL_DIV_III(32, 
 					       ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] 
 						 << 0x12U) 
 						| (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] 
-						   >> 0xeU)), vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2))
-				 : ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2)
+						   >> 0xeU)), vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2))
+				 : ((0U == vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2)
 				     ? 0xffffffffU : 
 				    VL_DIVS_III(32, 
 						((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] 
 						  << 0x12U) 
 						 | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] 
-						    >> 0xeU)), vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2))))
+						    >> 0xeU)), vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2))))
 			 : ((0x400U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
 			     ? ((0x200U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
 				 ? (IData)((((QData)((IData)(
@@ -1595,7 +1596,7 @@ void VVortex::_settle__TOP__2(VVortex__Syms* __restrict vlSymsp) {
 							       << 0x12U) 
 							      | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] 
 								 >> 0xeU)))) 
-					     * (QData)((IData)(vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2))) 
+					     * (QData)((IData)(vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2))) 
 					    >> 0x20U))
 				 : (IData)((((((QData)((IData)(
 							       VL_NEGATE_I((IData)(
@@ -1608,12 +1609,12 @@ void VVortex::_settle__TOP__2(VVortex__Syms* __restrict vlSymsp) {
 								  << 0x12U) 
 								 | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] 
 								    >> 0xeU))))) 
-					     * (QData)((IData)(vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2))) 
+					     * (QData)((IData)(vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2))) 
 					    >> 0x20U)))
 			     : ((0x200U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
-				 ? (IData)((vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__mult_signed_result 
+				 ? (IData)((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__mult_signed_result 
 					    >> 0x20U))
-				 : (IData)(vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__mult_signed_result)))))
+				 : (IData)(vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__mult_signed_result)))))
 	    : ((0x1000U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
 	        ? ((0x800U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
 		    ? ((0x400U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
@@ -1632,17 +1633,17 @@ void VVortex::_settle__TOP__2(VVortex__Syms* __restrict vlSymsp) {
 			    : ((((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] 
 				  << 0x12U) | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] 
 					       >> 0xeU)) 
-				>= vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2)
+				>= vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2)
 			        ? 0U : 0xffffffffU))
 		        : ((0x200U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
-			    ? (vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2 
+			    ? (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2 
 			       & ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] 
 				   << 0x12U) | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] 
 						>> 0xeU)))
 			    : (((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] 
 				 << 0x12U) | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] 
 					      >> 0xeU)) 
-			       | vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2))))
+			       | vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2))))
 	        : ((0x800U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
 		    ? ((0x400U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
 		        ? ((0x200U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
@@ -1652,20 +1653,20 @@ void VVortex::_settle__TOP__2(VVortex__Syms* __restrict vlSymsp) {
 					      | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] 
 						 >> 0xeU)), 
 					     (0x1fU 
-					      & vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2))
+					      & vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2))
 			    : (((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] 
 				 << 0x12U) | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] 
 					      >> 0xeU)) 
-			       >> (0x1fU & vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2)))
+			       >> (0x1fU & vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2)))
 		        : ((0x200U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
 			    ? (((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] 
 				 << 0x12U) | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] 
 					      >> 0xeU)) 
-			       ^ vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2)
+			       ^ vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2)
 			    : ((((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] 
 				  << 0x12U) | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] 
 					       >> 0xeU)) 
-				< vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2)
+				< vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2)
 			        ? 1U : 0U))) : ((0x400U 
 						 & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
 						 ? 
@@ -1676,7 +1677,7 @@ void VVortex::_settle__TOP__2(VVortex__Syms* __restrict vlSymsp) {
 							     ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] 
 							       << 0x12U) 
 							      | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] 
-								 >> 0xeU)), vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2)
+								 >> 0xeU)), vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2)
 						   ? 1U
 						   : 0U)
 						  : 
@@ -1686,7 +1687,7 @@ void VVortex::_settle__TOP__2(VVortex__Syms* __restrict vlSymsp) {
 						      >> 0xeU)) 
 						  << 
 						  (0x1fU 
-						   & vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2)))
+						   & vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2)))
 						 : 
 						((0x200U 
 						  & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
@@ -1695,21 +1696,21 @@ void VVortex::_settle__TOP__2(VVortex__Syms* __restrict vlSymsp) {
 						    << 0x12U) 
 						   | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] 
 						      >> 0xeU)) 
-						  - vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2)
+						  - vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2)
 						  : 
 						 (((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] 
 						    << 0x12U) 
 						   | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] 
 						      >> 0xeU)) 
-						  + vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2))))));
+						  + vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2))))));
     // ALWAYS at VX_alu.v:48
-    vlTOPp->Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__2__KET____DOT__vx_alu__out_alu_result 
+    vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__2__KET____DOT__vx_alu__out_alu_result 
 	= ((0x2000U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
 	    ? ((0x1000U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
 	        ? 0U : ((0x800U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
 			 ? ((0x400U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
 			     ? ((0x200U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
-				 ? ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2)
+				 ? ((0U == vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2)
 				     ? ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] 
 					 << 0x12U) 
 					| (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] 
@@ -1718,8 +1719,8 @@ void VVortex::_settle__TOP__2(VVortex__Syms* __restrict vlSymsp) {
 						     ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] 
 						       << 0x12U) 
 						      | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] 
-							 >> 0xeU)), vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2))
-				 : ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2)
+							 >> 0xeU)), vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2))
+				 : ((0U == vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2)
 				     ? ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] 
 					 << 0x12U) 
 					| (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] 
@@ -1728,22 +1729,22 @@ void VVortex::_settle__TOP__2(VVortex__Syms* __restrict vlSymsp) {
 						      ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] 
 							<< 0x12U) 
 						       | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] 
-							  >> 0xeU)), vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2)))
+							  >> 0xeU)), vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2)))
 			     : ((0x200U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
-				 ? ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2)
+				 ? ((0U == vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2)
 				     ? 0xffffffffU : 
 				    VL_DIV_III(32, 
 					       ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] 
 						 << 0x12U) 
 						| (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] 
-						   >> 0xeU)), vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2))
-				 : ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2)
+						   >> 0xeU)), vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2))
+				 : ((0U == vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2)
 				     ? 0xffffffffU : 
 				    VL_DIVS_III(32, 
 						((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] 
 						  << 0x12U) 
 						 | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] 
-						    >> 0xeU)), vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2))))
+						    >> 0xeU)), vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2))))
 			 : ((0x400U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
 			     ? ((0x200U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
 				 ? (IData)((((QData)((IData)(
@@ -1751,7 +1752,7 @@ void VVortex::_settle__TOP__2(VVortex__Syms* __restrict vlSymsp) {
 							       << 0x12U) 
 							      | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] 
 								 >> 0xeU)))) 
-					     * (QData)((IData)(vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2))) 
+					     * (QData)((IData)(vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2))) 
 					    >> 0x20U))
 				 : (IData)((((((QData)((IData)(
 							       VL_NEGATE_I((IData)(
@@ -1764,12 +1765,12 @@ void VVortex::_settle__TOP__2(VVortex__Syms* __restrict vlSymsp) {
 								  << 0x12U) 
 								 | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] 
 								    >> 0xeU))))) 
-					     * (QData)((IData)(vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2))) 
+					     * (QData)((IData)(vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2))) 
 					    >> 0x20U)))
 			     : ((0x200U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
-				 ? (IData)((vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__mult_signed_result 
+				 ? (IData)((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__mult_signed_result 
 					    >> 0x20U))
-				 : (IData)(vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__mult_signed_result)))))
+				 : (IData)(vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__mult_signed_result)))))
 	    : ((0x1000U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
 	        ? ((0x800U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
 		    ? ((0x400U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
@@ -1788,17 +1789,17 @@ void VVortex::_settle__TOP__2(VVortex__Syms* __restrict vlSymsp) {
 			    : ((((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] 
 				  << 0x12U) | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] 
 					       >> 0xeU)) 
-				>= vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2)
+				>= vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2)
 			        ? 0U : 0xffffffffU))
 		        : ((0x200U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
-			    ? (vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2 
+			    ? (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2 
 			       & ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] 
 				   << 0x12U) | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] 
 						>> 0xeU)))
 			    : (((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] 
 				 << 0x12U) | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] 
 					      >> 0xeU)) 
-			       | vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2))))
+			       | vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2))))
 	        : ((0x800U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
 		    ? ((0x400U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
 		        ? ((0x200U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
@@ -1808,20 +1809,20 @@ void VVortex::_settle__TOP__2(VVortex__Syms* __restrict vlSymsp) {
 					      | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] 
 						 >> 0xeU)), 
 					     (0x1fU 
-					      & vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2))
+					      & vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2))
 			    : (((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] 
 				 << 0x12U) | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] 
 					      >> 0xeU)) 
-			       >> (0x1fU & vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2)))
+			       >> (0x1fU & vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2)))
 		        : ((0x200U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
 			    ? (((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] 
 				 << 0x12U) | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] 
 					      >> 0xeU)) 
-			       ^ vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2)
+			       ^ vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2)
 			    : ((((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] 
 				  << 0x12U) | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] 
 					       >> 0xeU)) 
-				< vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2)
+				< vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2)
 			        ? 1U : 0U))) : ((0x400U 
 						 & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
 						 ? 
@@ -1832,7 +1833,7 @@ void VVortex::_settle__TOP__2(VVortex__Syms* __restrict vlSymsp) {
 							     ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] 
 							       << 0x12U) 
 							      | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] 
-								 >> 0xeU)), vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2)
+								 >> 0xeU)), vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2)
 						   ? 1U
 						   : 0U)
 						  : 
@@ -1842,7 +1843,7 @@ void VVortex::_settle__TOP__2(VVortex__Syms* __restrict vlSymsp) {
 						      >> 0xeU)) 
 						  << 
 						  (0x1fU 
-						   & vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2)))
+						   & vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2)))
 						 : 
 						((0x200U 
 						  & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
@@ -1851,21 +1852,21 @@ void VVortex::_settle__TOP__2(VVortex__Syms* __restrict vlSymsp) {
 						    << 0x12U) 
 						   | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] 
 						      >> 0xeU)) 
-						  - vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2)
+						  - vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2)
 						  : 
 						 (((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] 
 						    << 0x12U) 
 						   | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] 
 						      >> 0xeU)) 
-						  + vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2))))));
+						  + vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2))))));
     // ALWAYS at VX_alu.v:48
-    vlTOPp->Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__3__KET____DOT__vx_alu__out_alu_result 
+    vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__3__KET____DOT__vx_alu__out_alu_result 
 	= ((0x2000U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
 	    ? ((0x1000U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
 	        ? 0U : ((0x800U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
 			 ? ((0x400U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
 			     ? ((0x200U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
-				 ? ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2)
+				 ? ((0U == vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2)
 				     ? ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xdU] 
 					 << 0x12U) 
 					| (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] 
@@ -1874,8 +1875,8 @@ void VVortex::_settle__TOP__2(VVortex__Syms* __restrict vlSymsp) {
 						     ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xdU] 
 						       << 0x12U) 
 						      | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] 
-							 >> 0xeU)), vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2))
-				 : ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2)
+							 >> 0xeU)), vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2))
+				 : ((0U == vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2)
 				     ? ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xdU] 
 					 << 0x12U) 
 					| (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] 
@@ -1884,22 +1885,22 @@ void VVortex::_settle__TOP__2(VVortex__Syms* __restrict vlSymsp) {
 						      ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xdU] 
 							<< 0x12U) 
 						       | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] 
-							  >> 0xeU)), vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2)))
+							  >> 0xeU)), vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2)))
 			     : ((0x200U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
-				 ? ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2)
+				 ? ((0U == vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2)
 				     ? 0xffffffffU : 
 				    VL_DIV_III(32, 
 					       ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xdU] 
 						 << 0x12U) 
 						| (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] 
-						   >> 0xeU)), vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2))
-				 : ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2)
+						   >> 0xeU)), vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2))
+				 : ((0U == vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2)
 				     ? 0xffffffffU : 
 				    VL_DIVS_III(32, 
 						((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xdU] 
 						  << 0x12U) 
 						 | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] 
-						    >> 0xeU)), vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2))))
+						    >> 0xeU)), vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2))))
 			 : ((0x400U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
 			     ? ((0x200U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
 				 ? (IData)((((QData)((IData)(
@@ -1907,7 +1908,7 @@ void VVortex::_settle__TOP__2(VVortex__Syms* __restrict vlSymsp) {
 							       << 0x12U) 
 							      | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] 
 								 >> 0xeU)))) 
-					     * (QData)((IData)(vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2))) 
+					     * (QData)((IData)(vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2))) 
 					    >> 0x20U))
 				 : (IData)((((((QData)((IData)(
 							       VL_NEGATE_I((IData)(
@@ -1920,12 +1921,12 @@ void VVortex::_settle__TOP__2(VVortex__Syms* __restrict vlSymsp) {
 								  << 0x12U) 
 								 | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] 
 								    >> 0xeU))))) 
-					     * (QData)((IData)(vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2))) 
+					     * (QData)((IData)(vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2))) 
 					    >> 0x20U)))
 			     : ((0x200U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
-				 ? (IData)((vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__mult_signed_result 
+				 ? (IData)((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__mult_signed_result 
 					    >> 0x20U))
-				 : (IData)(vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__mult_signed_result)))))
+				 : (IData)(vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__mult_signed_result)))))
 	    : ((0x1000U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
 	        ? ((0x800U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
 		    ? ((0x400U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
@@ -1944,17 +1945,17 @@ void VVortex::_settle__TOP__2(VVortex__Syms* __restrict vlSymsp) {
 			    : ((((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xdU] 
 				  << 0x12U) | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] 
 					       >> 0xeU)) 
-				>= vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2)
+				>= vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2)
 			        ? 0U : 0xffffffffU))
 		        : ((0x200U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
-			    ? (vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2 
+			    ? (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2 
 			       & ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xdU] 
 				   << 0x12U) | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] 
 						>> 0xeU)))
 			    : (((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xdU] 
 				 << 0x12U) | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] 
 					      >> 0xeU)) 
-			       | vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2))))
+			       | vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2))))
 	        : ((0x800U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
 		    ? ((0x400U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
 		        ? ((0x200U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
@@ -1964,20 +1965,20 @@ void VVortex::_settle__TOP__2(VVortex__Syms* __restrict vlSymsp) {
 					      | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] 
 						 >> 0xeU)), 
 					     (0x1fU 
-					      & vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2))
+					      & vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2))
 			    : (((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xdU] 
 				 << 0x12U) | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] 
 					      >> 0xeU)) 
-			       >> (0x1fU & vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2)))
+			       >> (0x1fU & vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2)))
 		        : ((0x200U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
 			    ? (((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xdU] 
 				 << 0x12U) | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] 
 					      >> 0xeU)) 
-			       ^ vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2)
+			       ^ vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2)
 			    : ((((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xdU] 
 				  << 0x12U) | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] 
 					       >> 0xeU)) 
-				< vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2)
+				< vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2)
 			        ? 1U : 0U))) : ((0x400U 
 						 & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
 						 ? 
@@ -1988,7 +1989,7 @@ void VVortex::_settle__TOP__2(VVortex__Syms* __restrict vlSymsp) {
 							     ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xdU] 
 							       << 0x12U) 
 							      | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] 
-								 >> 0xeU)), vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2)
+								 >> 0xeU)), vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2)
 						   ? 1U
 						   : 0U)
 						  : 
@@ -1998,7 +1999,7 @@ void VVortex::_settle__TOP__2(VVortex__Syms* __restrict vlSymsp) {
 						      >> 0xeU)) 
 						  << 
 						  (0x1fU 
-						   & vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2)))
+						   & vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2)))
 						 : 
 						((0x200U 
 						  & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
@@ -2007,49 +2008,49 @@ void VVortex::_settle__TOP__2(VVortex__Syms* __restrict vlSymsp) {
 						    << 0x12U) 
 						   | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] 
 						      >> 0xeU)) 
-						  - vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2)
+						  - vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2)
 						  : 
 						 (((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xdU] 
 						    << 0x12U) 
 						   | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] 
 						      >> 0xeU)) 
-						  + vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2))))));
+						  + vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2))))));
     vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_mem_fwd 
 	= ((((((0x1fU & ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] 
 			  << 9U) | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] 
 				    >> 0x17U))) == 
-	       (0x1fU & ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
-			  << 9U) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] 
+	       (0x1fU & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
+			  << 9U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] 
 				    >> 0x17U)))) & 
 	      (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] 
 				<< 9U) | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] 
 					  >> 0x17U))))) 
-	     & (0U != (3U & ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
-			      << 0xbU) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] 
+	     & (0U != (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
+			      << 0xbU) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] 
 					  >> 0x15U))))) 
 	    & (~ (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_exe_fwd))) 
 	   & ((0xfU & ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] 
 			<< 0x1cU) | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] 
 				     >> 4U))) == (0xfU 
-						  & vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])));
+						  & vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])));
     vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_mem_fwd 
 	= ((((((0x1fU & ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] 
 			  << 4U) | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] 
 				    >> 0x1cU))) == 
-	       (0x1fU & ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
-			  << 9U) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] 
+	       (0x1fU & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
+			  << 9U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] 
 				    >> 0x17U)))) & 
 	      (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] 
 				<< 4U) | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] 
 					  >> 0x1cU))))) 
-	     & (0U != (3U & ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
-			      << 0xbU) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] 
+	     & (0U != (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
+			      << 0xbU) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] 
 					  >> 0x15U))))) 
 	    & (~ (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_exe_fwd))) 
 	   & ((0xfU & ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] 
 			<< 0x1cU) | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] 
 				     >> 4U))) == (0xfU 
-						  & vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])));
+						  & vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])));
     vlTOPp->out_ebreak = ((0U == (0xfU & ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] 
 					   << 0x1cU) 
 					  | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] 
@@ -2282,28 +2283,28 @@ void VVortex::_settle__TOP__2(VVortex__Syms* __restrict vlSymsp) {
 	= vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_fetch__DOT__genblk2__BRA__6__KET____DOT__VX_Warp__DOT__temp_PC;
     vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_fetch__DOT__warp_glob_pc[7U] 
 	= vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_fetch__DOT__genblk2__BRA__7__KET____DOT__VX_Warp__DOT__temp_PC;
-    vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[0U] 
-	= vlTOPp->Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__0__KET____DOT__vx_alu__out_alu_result;
-    vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[1U] 
-	= vlTOPp->Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__1__KET____DOT__vx_alu__out_alu_result;
-    vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[2U] 
-	= vlTOPp->Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__2__KET____DOT__vx_alu__out_alu_result;
-    vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[3U] 
-	= vlTOPp->Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__3__KET____DOT__vx_alu__out_alu_result;
+    vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_exe_mem_req.alu_result[0U] 
+	= vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__0__KET____DOT__vx_alu__out_alu_result;
+    vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_exe_mem_req.alu_result[1U] 
+	= vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__1__KET____DOT__vx_alu__out_alu_result;
+    vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_exe_mem_req.alu_result[2U] 
+	= vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__2__KET____DOT__vx_alu__out_alu_result;
+    vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_exe_mem_req.alu_result[3U] 
+	= vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__3__KET____DOT__vx_alu__out_alu_result;
     vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_wb_fwd 
 	= (((((((0x1fU & ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] 
 			   << 9U) | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] 
 				     >> 0x17U))) == 
-		(0x1fU & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
-			   << 0x16U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+		(0x1fU & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			   << 0x16U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					>> 0xaU)))) 
 	       & (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] 
 				   << 9U) | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] 
 					     >> 0x17U))))) 
-	      & (0U != (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
-			       << 0x18U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+	      & (0U != (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			       << 0x18U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					    >> 8U))))) 
-	     & ((0xfU & vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U]) 
+	     & ((0xfU & vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U]) 
 		== (0xfU & ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] 
 			     << 0x1cU) | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] 
 					  >> 4U))))) 
@@ -2312,32 +2313,32 @@ void VVortex::_settle__TOP__2(VVortex__Syms* __restrict vlSymsp) {
     vlTOPp->Vortex__DOT__forwarding_fwd_stall = ((((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_exe_fwd) 
 						   | (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_exe_fwd)) 
 						  & (2U 
-						     == (IData)(vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.wb))) 
+						     == (IData)(vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_exe_mem_req.wb))) 
 						 | (((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_mem_fwd) 
 						     | (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_mem_fwd)) 
 						    & (2U 
 						       == 
 						       (3U 
-							& ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
+							& ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
 							    << 0xbU) 
-							   | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] 
+							   | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] 
 							      >> 0x15U))))));
     vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_wb_fwd 
 	= (((((((0x1fU & ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] 
 			   << 4U) | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] 
 				     >> 0x1cU))) == 
-		(0x1fU & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
-			   << 0x16U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+		(0x1fU & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			   << 0x16U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					>> 0xaU)))) 
 	       & (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] 
 				   << 4U) | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] 
 					     >> 0x1cU))))) 
-	      & (0U != (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
-			       << 0x18U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+	      & (0U != (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			       << 0x18U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					    >> 8U))))) 
 	     & (~ (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_exe_fwd))) 
 	    & (~ (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_mem_fwd))) 
-	   & ((0xfU & vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U]) 
+	   & ((0xfU & vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U]) 
 	      == (0xfU & ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] 
 			   << 0x1cU) | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] 
 					>> 4U)))));
@@ -2507,7 +2508,7 @@ void VVortex::_settle__TOP__2(VVortex__Syms* __restrict vlSymsp) {
 					     | (0x7f800000U 
 						& (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xdU] 
 						   >> 1U)))) 
-					 | (((IData)(vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.wb) 
+					 | (((IData)(vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_exe_mem_req.wb) 
 					     << 0x15U) 
 					    | (0x1f0000U 
 					       & ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xeU] 
@@ -2521,15 +2522,15 @@ void VVortex::_settle__TOP__2(VVortex__Syms* __restrict vlSymsp) {
 						     >> 3U)))) 
 			| (0x7ffU & (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[9U] 
 				     >> 3U))));
-    __Vtemp26[8U] = ((0xffffU & ((0xfffcU & (vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[0U] 
+    __Vtemp26[8U] = ((0xffffU & ((0xfffcU & (vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_exe_mem_req.alu_result[0U] 
 					     << 2U)) 
 				 | ((3U & (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[4U] 
 					   >> 4U)) 
-				    | (0xffffU & ((IData)(vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.wb) 
+				    | (0xffffU & ((IData)(vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_exe_mem_req.wb) 
 						  >> 0xbU))))) 
-		     | (0xffff0000U & (vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[0U] 
+		     | (0xffff0000U & (vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_exe_mem_req.alu_result[0U] 
 				       << 2U)));
-    vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[0U] 
+    vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[0U] 
 	= ((0xfffff800U & (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[4U] 
 			   << 5U)) | ((0x700U & ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[4U] 
 						  << 0xbU) 
@@ -2537,19 +2538,19 @@ void VVortex::_settle__TOP__2(VVortex__Syms* __restrict vlSymsp) {
 						    & (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[3U] 
 						       >> 0x15U)))) 
 				      | (0xffU & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0U])));
-    vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[1U] 
+    vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[1U] 
 	= ((0x7ffU & ((0x7e0U & (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U] 
 				 << 5U)) | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[4U] 
 					    >> 0x1bU))) 
 	   | (0xfffff800U & (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[2U] 
 			     << 2U)));
-    vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[2U] 
+    vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[2U] 
 	= ((0x7ffU & ((0x7fcU & (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[3U] 
 				 << 2U)) | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[2U] 
 					    >> 0x1eU))) 
 	   | (0xfffff800U & (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0U] 
 			     << 3U)));
-    vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[3U] 
+    vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[3U] 
 	= ((0x7ffU & ((0x7f8U & (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[1U] 
 				 << 3U)) | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0U] 
 					    >> 0x1dU))) 
@@ -2557,54 +2558,54 @@ void VVortex::_settle__TOP__2(VVortex__Syms* __restrict vlSymsp) {
 			      << 0x1dU) | (0x1ffff800U 
 					   & (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U] 
 					      >> 3U)))));
-    vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[4U] 
+    vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[4U] 
 	= ((0x7ffU & (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[6U] 
 		      >> 3U)) | (0xfffff800U & ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[7U] 
 						 << 0x1dU) 
 						| (0x1ffff800U 
 						   & (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[6U] 
 						      >> 3U)))));
-    vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[5U] 
+    vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[5U] 
 	= ((0x7ffU & (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[7U] 
 		      >> 3U)) | (0xfffff800U & ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[8U] 
 						 << 0x1dU) 
 						| (0x1ffff800U 
 						   & (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[7U] 
 						      >> 3U)))));
-    vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[6U] 
+    vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[6U] 
 	= ((0x7ffU & (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[8U] 
 		      >> 3U)) | (0xfffff800U & ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[9U] 
 						 << 0x1dU) 
 						| (0x1ffff800U 
 						   & (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[8U] 
 						      >> 3U)))));
-    vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[7U] 
+    vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[7U] 
 	= __Vtemp26[7U];
-    vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[8U] 
+    vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[8U] 
 	= __Vtemp26[8U];
-    vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[9U] 
-	= ((0xffffU & ((3U & (vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[0U] 
+    vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[9U] 
+	= ((0xffffU & ((3U & (vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_exe_mem_req.alu_result[0U] 
 			      >> 0x1eU)) | (0xfffcU 
-					    & (vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[1U] 
+					    & (vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_exe_mem_req.alu_result[1U] 
 					       << 2U)))) 
-	   | (0xffff0000U & (vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[1U] 
+	   | (0xffff0000U & (vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_exe_mem_req.alu_result[1U] 
 			     << 2U)));
-    vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[0xaU] 
-	= ((0xffffU & ((3U & (vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[1U] 
+    vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[0xaU] 
+	= ((0xffffU & ((3U & (vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_exe_mem_req.alu_result[1U] 
 			      >> 0x1eU)) | (0xfffcU 
-					    & (vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[2U] 
+					    & (vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_exe_mem_req.alu_result[2U] 
 					       << 2U)))) 
-	   | (0xffff0000U & (vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[2U] 
+	   | (0xffff0000U & (vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_exe_mem_req.alu_result[2U] 
 			     << 2U)));
-    vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[0xbU] 
-	= ((0xffffU & ((3U & (vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[2U] 
+    vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[0xbU] 
+	= ((0xffffU & ((3U & (vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_exe_mem_req.alu_result[2U] 
 			      >> 0x1eU)) | (0xfffcU 
-					    & (vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[3U] 
+					    & (vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_exe_mem_req.alu_result[3U] 
 					       << 2U)))) 
-	   | (0xffff0000U & (vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[3U] 
+	   | (0xffff0000U & (vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_exe_mem_req.alu_result[3U] 
 			     << 2U)));
-    vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[0xcU] 
-	= ((0xffffU & ((3U & (vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[3U] 
+    vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[0xcU] 
+	= ((0xffffU & ((3U & (vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_exe_mem_req.alu_result[3U] 
 			      >> 0x1eU)) | (0xfffcU 
 					    & ((((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] 
 						  << 0x12U) 
@@ -2617,11 +2618,11 @@ void VVortex::_settle__TOP__2(VVortex__Syms* __restrict vlSymsp) {
 						      >> 8U))) 
 					       << 2U)))) 
 	   | (0xffff0000U & (__Vtemp17[5U] << 0x10U)));
-    vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[0xdU] 
+    vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[0xdU] 
 	= ((0xffffU & (__Vtemp17[5U] >> 0x10U)) | (0xffff0000U 
 						   & (__Vtemp17[6U] 
 						      << 0x10U)));
-    vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[0xeU] 
+    vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[0xeU] 
 	= (0xffffU & ((0xfff0U & ((0xffc0U & (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xfU] 
 					      << 6U)) 
 				  | (0x30U & (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xeU] 
@@ -2634,320 +2635,320 @@ void VVortex::_settle__TOP__2(VVortex__Syms* __restrict vlSymsp) {
 	    | (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_mem_fwd)) 
 	   | (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_wb_fwd));
     __Vtemp41[0U] = ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_mem_fwd)
-		      ? ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
+		      ? ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
 					<< 0xbU) | 
-				       (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] 
+				       (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] 
 					>> 0x15U))))
 			  ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next[0U]
-			  : ((2U == (3U & ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
+			  : ((2U == (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
 					    << 0xbU) 
-					   | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] 
+					   | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] 
 					      >> 0x15U))))
-			      ? vlSymsp->TOP__Vortex__DOT__VX_mem_wb.mem_result[0U]
-			      : ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[9U] 
-				  << 0x1eU) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
+			      ? vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_mem_wb.mem_result[0U]
+			      : ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[9U] 
+				  << 0x1eU) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
 					       >> 2U))))
 		      : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_wb_fwd)
-			  ? ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			  ? ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
 					    << 0x18U) 
-					   | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+					   | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					      >> 8U))))
 			      ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next[0U]
-			      : ((2U == (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			      : ((2U == (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
 						<< 0x18U) 
-					       | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+					       | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 						  >> 8U))))
-				  ? ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+				  ? ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
 				      << 0x11U) | (
-						   vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+						   vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 						   >> 0xfU))
-				  : ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[6U] 
+				  : ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[6U] 
 				      << 0x11U) | (
-						   vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[5U] 
+						   vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[5U] 
 						   >> 0xfU))))
-			  : vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[0U]));
+			  : vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_exe_mem_req.alu_result[0U]));
     __Vtemp41[1U] = ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_mem_fwd)
-		      ? ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
+		      ? ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
 					<< 0xbU) | 
-				       (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] 
+				       (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] 
 					>> 0x15U))))
 			  ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next[1U]
-			  : ((2U == (3U & ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
+			  : ((2U == (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
 					    << 0xbU) 
-					   | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] 
+					   | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] 
 					      >> 0x15U))))
-			      ? vlSymsp->TOP__Vortex__DOT__VX_mem_wb.mem_result[1U]
-			      : ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xaU] 
-				  << 0x1eU) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[9U] 
+			      ? vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_mem_wb.mem_result[1U]
+			      : ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xaU] 
+				  << 0x1eU) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[9U] 
 					       >> 2U))))
 		      : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_wb_fwd)
-			  ? ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			  ? ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
 					    << 0x18U) 
-					   | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+					   | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					      >> 8U))))
 			      ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next[1U]
-			      : ((2U == (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			      : ((2U == (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
 						<< 0x18U) 
-					       | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+					       | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 						  >> 8U))))
-				  ? ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[3U] 
+				  ? ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[3U] 
 				      << 0x11U) | (
-						   vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+						   vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
 						   >> 0xfU))
-				  : ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[7U] 
+				  : ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[7U] 
 				      << 0x11U) | (
-						   vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[6U] 
+						   vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[6U] 
 						   >> 0xfU))))
-			  : vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[1U]));
+			  : vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_exe_mem_req.alu_result[1U]));
     __Vtemp41[2U] = ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_mem_fwd)
-		      ? ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
+		      ? ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
 					<< 0xbU) | 
-				       (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] 
+				       (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] 
 					>> 0x15U))))
 			  ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next[2U]
-			  : ((2U == (3U & ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
+			  : ((2U == (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
 					    << 0xbU) 
-					   | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] 
+					   | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] 
 					      >> 0x15U))))
-			      ? vlSymsp->TOP__Vortex__DOT__VX_mem_wb.mem_result[2U]
-			      : ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xbU] 
-				  << 0x1eU) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xaU] 
+			      ? vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_mem_wb.mem_result[2U]
+			      : ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xbU] 
+				  << 0x1eU) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xaU] 
 					       >> 2U))))
 		      : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_wb_fwd)
-			  ? ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			  ? ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
 					    << 0x18U) 
-					   | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+					   | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					      >> 8U))))
 			      ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next[2U]
-			      : ((2U == (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			      : ((2U == (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
 						<< 0x18U) 
-					       | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+					       | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 						  >> 8U))))
-				  ? ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[4U] 
+				  ? ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[4U] 
 				      << 0x11U) | (
-						   vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[3U] 
+						   vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[3U] 
 						   >> 0xfU))
-				  : ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[8U] 
+				  : ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[8U] 
 				      << 0x11U) | (
-						   vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[7U] 
+						   vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[7U] 
 						   >> 0xfU))))
-			  : vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[2U]));
+			  : vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_exe_mem_req.alu_result[2U]));
     __Vtemp41[3U] = ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_mem_fwd)
-		      ? ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
+		      ? ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
 					<< 0xbU) | 
-				       (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] 
+				       (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] 
 					>> 0x15U))))
 			  ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next[3U]
-			  : ((2U == (3U & ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
+			  : ((2U == (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
 					    << 0xbU) 
-					   | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] 
+					   | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] 
 					      >> 0x15U))))
-			      ? vlSymsp->TOP__Vortex__DOT__VX_mem_wb.mem_result[3U]
-			      : ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xcU] 
-				  << 0x1eU) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xbU] 
+			      ? vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_mem_wb.mem_result[3U]
+			      : ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xcU] 
+				  << 0x1eU) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xbU] 
 					       >> 2U))))
 		      : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_wb_fwd)
-			  ? ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			  ? ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
 					    << 0x18U) 
-					   | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+					   | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					      >> 8U))))
 			      ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next[3U]
-			      : ((2U == (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			      : ((2U == (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
 						<< 0x18U) 
-					       | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+					       | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 						  >> 8U))))
-				  ? ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[5U] 
+				  ? ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[5U] 
 				      << 0x11U) | (
-						   vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[4U] 
+						   vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[4U] 
 						   >> 0xfU))
-				  : ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[9U] 
+				  : ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[9U] 
 				      << 0x11U) | (
-						   vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[8U] 
+						   vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[8U] 
 						   >> 0xfU))))
-			  : vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[3U]));
+			  : vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_exe_mem_req.alu_result[3U]));
     vlTOPp->Vortex__DOT__vx_forwarding__DOT__out_src1_fwd_data[0U] 
 	= ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_exe_fwd)
-	    ? ((3U == (IData)(vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.wb))
+	    ? ((3U == (IData)(vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_exe_mem_req.wb))
 	        ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next[0U]
-	        : vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[0U])
+	        : vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_exe_mem_req.alu_result[0U])
 	    : __Vtemp41[0U]);
     vlTOPp->Vortex__DOT__vx_forwarding__DOT__out_src1_fwd_data[1U] 
 	= ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_exe_fwd)
-	    ? ((3U == (IData)(vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.wb))
+	    ? ((3U == (IData)(vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_exe_mem_req.wb))
 	        ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next[1U]
-	        : vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[1U])
+	        : vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_exe_mem_req.alu_result[1U])
 	    : __Vtemp41[1U]);
     vlTOPp->Vortex__DOT__vx_forwarding__DOT__out_src1_fwd_data[2U] 
 	= ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_exe_fwd)
-	    ? ((3U == (IData)(vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.wb))
+	    ? ((3U == (IData)(vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_exe_mem_req.wb))
 	        ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next[2U]
-	        : vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[2U])
+	        : vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_exe_mem_req.alu_result[2U])
 	    : __Vtemp41[2U]);
     vlTOPp->Vortex__DOT__vx_forwarding__DOT__out_src1_fwd_data[3U] 
 	= ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_exe_fwd)
-	    ? ((3U == (IData)(vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.wb))
+	    ? ((3U == (IData)(vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_exe_mem_req.wb))
 	        ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next[3U]
-	        : vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[3U])
+	        : vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_exe_mem_req.alu_result[3U])
 	    : __Vtemp41[3U]);
     vlTOPp->Vortex__DOT__vx_forwarding__DOT__out_src2_fwd 
 	= (((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_exe_fwd) 
 	    | (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_mem_fwd)) 
 	   | (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_wb_fwd));
     __Vtemp57[0U] = ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_mem_fwd)
-		      ? ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
+		      ? ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
 					<< 0xbU) | 
-				       (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] 
+				       (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] 
 					>> 0x15U))))
 			  ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next[0U]
-			  : ((2U == (3U & ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
+			  : ((2U == (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
 					    << 0xbU) 
-					   | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] 
+					   | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] 
 					      >> 0x15U))))
-			      ? vlSymsp->TOP__Vortex__DOT__VX_mem_wb.mem_result[0U]
-			      : ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[9U] 
-				  << 0x1eU) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
+			      ? vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_mem_wb.mem_result[0U]
+			      : ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[9U] 
+				  << 0x1eU) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
 					       >> 2U))))
 		      : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_wb_fwd)
-			  ? ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			  ? ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
 					    << 0x18U) 
-					   | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+					   | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					      >> 8U))))
 			      ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next[0U]
-			      : ((2U == (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			      : ((2U == (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
 						<< 0x18U) 
-					       | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+					       | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 						  >> 8U))))
-				  ? ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+				  ? ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
 				      << 0x11U) | (
-						   vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+						   vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 						   >> 0xfU))
-				  : ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[6U] 
+				  : ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[6U] 
 				      << 0x11U) | (
-						   vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[5U] 
+						   vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[5U] 
 						   >> 0xfU))))
-			  : vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[0U]));
+			  : vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_exe_mem_req.alu_result[0U]));
     __Vtemp57[1U] = ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_mem_fwd)
-		      ? ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
+		      ? ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
 					<< 0xbU) | 
-				       (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] 
+				       (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] 
 					>> 0x15U))))
 			  ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next[1U]
-			  : ((2U == (3U & ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
+			  : ((2U == (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
 					    << 0xbU) 
-					   | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] 
+					   | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] 
 					      >> 0x15U))))
-			      ? vlSymsp->TOP__Vortex__DOT__VX_mem_wb.mem_result[1U]
-			      : ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xaU] 
-				  << 0x1eU) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[9U] 
+			      ? vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_mem_wb.mem_result[1U]
+			      : ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xaU] 
+				  << 0x1eU) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[9U] 
 					       >> 2U))))
 		      : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_wb_fwd)
-			  ? ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			  ? ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
 					    << 0x18U) 
-					   | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+					   | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					      >> 8U))))
 			      ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next[1U]
-			      : ((2U == (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			      : ((2U == (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
 						<< 0x18U) 
-					       | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+					       | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 						  >> 8U))))
-				  ? ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[3U] 
+				  ? ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[3U] 
 				      << 0x11U) | (
-						   vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+						   vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
 						   >> 0xfU))
-				  : ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[7U] 
+				  : ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[7U] 
 				      << 0x11U) | (
-						   vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[6U] 
+						   vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[6U] 
 						   >> 0xfU))))
-			  : vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[1U]));
+			  : vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_exe_mem_req.alu_result[1U]));
     __Vtemp57[2U] = ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_mem_fwd)
-		      ? ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
+		      ? ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
 					<< 0xbU) | 
-				       (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] 
+				       (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] 
 					>> 0x15U))))
 			  ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next[2U]
-			  : ((2U == (3U & ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
+			  : ((2U == (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
 					    << 0xbU) 
-					   | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] 
+					   | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] 
 					      >> 0x15U))))
-			      ? vlSymsp->TOP__Vortex__DOT__VX_mem_wb.mem_result[2U]
-			      : ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xbU] 
-				  << 0x1eU) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xaU] 
+			      ? vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_mem_wb.mem_result[2U]
+			      : ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xbU] 
+				  << 0x1eU) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xaU] 
 					       >> 2U))))
 		      : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_wb_fwd)
-			  ? ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			  ? ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
 					    << 0x18U) 
-					   | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+					   | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					      >> 8U))))
 			      ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next[2U]
-			      : ((2U == (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			      : ((2U == (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
 						<< 0x18U) 
-					       | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+					       | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 						  >> 8U))))
-				  ? ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[4U] 
+				  ? ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[4U] 
 				      << 0x11U) | (
-						   vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[3U] 
+						   vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[3U] 
 						   >> 0xfU))
-				  : ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[8U] 
+				  : ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[8U] 
 				      << 0x11U) | (
-						   vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[7U] 
+						   vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[7U] 
 						   >> 0xfU))))
-			  : vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[2U]));
+			  : vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_exe_mem_req.alu_result[2U]));
     __Vtemp57[3U] = ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_mem_fwd)
-		      ? ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
+		      ? ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
 					<< 0xbU) | 
-				       (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] 
+				       (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] 
 					>> 0x15U))))
 			  ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next[3U]
-			  : ((2U == (3U & ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
+			  : ((2U == (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
 					    << 0xbU) 
-					   | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] 
+					   | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] 
 					      >> 0x15U))))
-			      ? vlSymsp->TOP__Vortex__DOT__VX_mem_wb.mem_result[3U]
-			      : ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xcU] 
-				  << 0x1eU) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xbU] 
+			      ? vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_mem_wb.mem_result[3U]
+			      : ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xcU] 
+				  << 0x1eU) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xbU] 
 					       >> 2U))))
 		      : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_wb_fwd)
-			  ? ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			  ? ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
 					    << 0x18U) 
-					   | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+					   | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					      >> 8U))))
 			      ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next[3U]
-			      : ((2U == (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			      : ((2U == (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
 						<< 0x18U) 
-					       | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+					       | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 						  >> 8U))))
-				  ? ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[5U] 
+				  ? ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[5U] 
 				      << 0x11U) | (
-						   vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[4U] 
+						   vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[4U] 
 						   >> 0xfU))
-				  : ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[9U] 
+				  : ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[9U] 
 				      << 0x11U) | (
-						   vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[8U] 
+						   vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[8U] 
 						   >> 0xfU))))
-			  : vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[3U]));
+			  : vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_exe_mem_req.alu_result[3U]));
     vlTOPp->Vortex__DOT__vx_forwarding__DOT__out_src2_fwd_data[0U] 
 	= ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_exe_fwd)
-	    ? ((3U == (IData)(vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.wb))
+	    ? ((3U == (IData)(vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_exe_mem_req.wb))
 	        ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next[0U]
-	        : vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[0U])
+	        : vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_exe_mem_req.alu_result[0U])
 	    : __Vtemp57[0U]);
     vlTOPp->Vortex__DOT__vx_forwarding__DOT__out_src2_fwd_data[1U] 
 	= ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_exe_fwd)
-	    ? ((3U == (IData)(vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.wb))
+	    ? ((3U == (IData)(vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_exe_mem_req.wb))
 	        ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next[1U]
-	        : vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[1U])
+	        : vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_exe_mem_req.alu_result[1U])
 	    : __Vtemp57[1U]);
     vlTOPp->Vortex__DOT__vx_forwarding__DOT__out_src2_fwd_data[2U] 
 	= ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_exe_fwd)
-	    ? ((3U == (IData)(vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.wb))
+	    ? ((3U == (IData)(vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_exe_mem_req.wb))
 	        ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next[2U]
-	        : vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[2U])
+	        : vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_exe_mem_req.alu_result[2U])
 	    : __Vtemp57[2U]);
     vlTOPp->Vortex__DOT__vx_forwarding__DOT__out_src2_fwd_data[3U] 
 	= ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_exe_fwd)
-	    ? ((3U == (IData)(vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.wb))
+	    ? ((3U == (IData)(vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_exe_mem_req.wb))
 	        ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next[3U]
-	        : vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[3U])
+	        : vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_exe_mem_req.alu_result[3U])
 	    : __Vtemp57[3U]);
     vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_fetch__DOT__add_warp 
 	= (((IData)(vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__is_wspawn) 
@@ -5214,7 +5215,7 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__3(VVortex__Syms* __restrict vlSymsp)
 	= ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[1U] 
 	    << 0x18U) | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0U] 
 			 >> 8U));
-    vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2 
+    vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2 
 	= ((0x40U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
 	    ? ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U] 
 		<< 0x1aU) | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[4U] 
@@ -5222,7 +5223,7 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__3(VVortex__Syms* __restrict vlSymsp)
 					 << 0x12U) 
 					| (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U] 
 					   >> 0xeU)));
-    vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2 
+    vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2 
 	= ((0x40U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
 	    ? ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U] 
 		<< 0x1aU) | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[4U] 
@@ -5230,7 +5231,7 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__3(VVortex__Syms* __restrict vlSymsp)
 					 << 0x12U) 
 					| (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[6U] 
 					   >> 0xeU)));
-    vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2 
+    vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2 
 	= ((0x40U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
 	    ? ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U] 
 		<< 0x1aU) | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[4U] 
@@ -5238,7 +5239,7 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__3(VVortex__Syms* __restrict vlSymsp)
 					 << 0x12U) 
 					| (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[7U] 
 					   >> 0xeU)));
-    vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2 
+    vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2 
 	= ((0x40U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
 	    ? ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U] 
 		<< 0x1aU) | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[4U] 
@@ -5246,38 +5247,38 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__3(VVortex__Syms* __restrict vlSymsp)
 					 << 0x12U) 
 					| (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[8U] 
 					   >> 0xeU)));
-    vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.wb = 
-	(3U & ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[6U] 
-		<< 0x19U) | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U] 
-			     >> 7U)));
-    vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__mult_signed_result 
+    vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_exe_mem_req.wb 
+	= (3U & ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[6U] 
+		  << 0x19U) | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U] 
+			       >> 7U)));
+    vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__mult_signed_result 
 	= VL_MULS_QQQ(64,64,64, VL_EXTENDS_QI(64,32, 
 					      ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] 
 						<< 0x12U) 
 					       | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[9U] 
 						  >> 0xeU))), 
-		      VL_EXTENDS_QI(64,32, vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2));
-    vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__mult_signed_result 
+		      VL_EXTENDS_QI(64,32, vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2));
+    vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__mult_signed_result 
 	= VL_MULS_QQQ(64,64,64, VL_EXTENDS_QI(64,32, 
 					      ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] 
 						<< 0x12U) 
 					       | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] 
 						  >> 0xeU))), 
-		      VL_EXTENDS_QI(64,32, vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2));
-    vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__mult_signed_result 
+		      VL_EXTENDS_QI(64,32, vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2));
+    vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__mult_signed_result 
 	= VL_MULS_QQQ(64,64,64, VL_EXTENDS_QI(64,32, 
 					      ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] 
 						<< 0x12U) 
 					       | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] 
 						  >> 0xeU))), 
-		      VL_EXTENDS_QI(64,32, vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2));
-    vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__mult_signed_result 
+		      VL_EXTENDS_QI(64,32, vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2));
+    vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__mult_signed_result 
 	= VL_MULS_QQQ(64,64,64, VL_EXTENDS_QI(64,32, 
 					      ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xdU] 
 						<< 0x12U) 
 					       | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] 
 						  >> 0xeU))), 
-		      VL_EXTENDS_QI(64,32, vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2));
+		      VL_EXTENDS_QI(64,32, vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2));
 }
 
 VL_INLINE_OPT void VVortex::_sequent__TOP__4(VVortex__Syms* __restrict vlSymsp) {
@@ -5556,47 +5557,47 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__4(VVortex__Syms* __restrict vlSymsp)
 	    }
 	}
     }
-    // ALWAYS at VX_csr_handler.v:43
-    if ((8U & vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xeU])) {
+    // ALWAYS at VX_csr_handler.v:50
+    if ((8U & vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xeU])) {
 	vlTOPp->Vortex__DOT__vx_csr_handler__DOT____Vlvbound1 
-	    = (0xfffU & ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xeU] 
-			  << 0x1dU) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xdU] 
+	    = (0xfffU & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xeU] 
+			  << 0x1dU) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xdU] 
 				       >> 3U)));
 	if (VL_LIKELY((0x300bU >= (0x3fffU & ((IData)(0xcU) 
 					      * (0xfffU 
-						 & (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xeU] 
+						 & (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xeU] 
 						    >> 4U))))))) {
 	    VL_ASSIGNSEL_WIII(12,(0x3fffU & ((IData)(0xcU) 
 					     * (0xfffU 
-						& (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xeU] 
+						& (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xeU] 
 						   >> 4U)))), vlTOPp->Vortex__DOT__vx_csr_handler__DOT__csr, vlTOPp->Vortex__DOT__vx_csr_handler__DOT____Vlvbound1);
 	}
     }
-    // ALWAYS at VX_csr_handler.v:34
+    // ALWAYS at VX_csr_handler.v:41
     vlTOPp->Vortex__DOT__vx_csr_handler__DOT__decode_csr_address 
 	= vlSymsp->TOP__Vortex__DOT__vx_front_end__DOT__VX_frE_to_bckE_req.csr_address;
-    // ALWAYS at VX_csr_handler.v:34
+    // ALWAYS at VX_csr_handler.v:41
     vlTOPp->Vortex__DOT__vx_csr_handler__DOT__cycle 
 	= (VL_ULL(1) + vlTOPp->Vortex__DOT__vx_csr_handler__DOT__cycle);
-    // ALWAYS at VX_csr_handler.v:34
-    if ((0x10U & vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U])) {
+    // ALWAYS at VX_csr_handler.v:41
+    if ((0x10U & vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U])) {
 	vlTOPp->Vortex__DOT__vx_csr_handler__DOT__instret 
 	    = (VL_ULL(1) + vlTOPp->Vortex__DOT__vx_csr_handler__DOT__instret);
     }
     // ALWAYS at VX_register_file_slave.v:53
-    if ((((((0U != (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
-			   << 0x18U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+    if ((((((0U != (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			   << 0x18U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					>> 8U)))) & 
-	    (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
-			      << 0x16U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+	    (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			      << 0x16U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					   >> 0xaU))))) 
-	   & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] 
-	      >> 7U)) & (0U == (0xfU & vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U]))) 
+	   & (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] 
+	      >> 7U)) & (0U == (0xfU & vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U]))) 
 	 & (~ (IData)(vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__real_zero_isclone)))) {
-	VL_ASSIGNSEL_WIII(32,(0x3e0U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+	VL_ASSIGNSEL_WIII(32,(0x3e0U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
 					 << 0x1bU) 
 					| (0x7ffffe0U 
-					   & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+					   & (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					      >> 5U)))), vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers, 
 			  vlSymsp->TOP__Vortex__DOT__VX_writeback_inter.write_data[3U]);
     } else {
@@ -5673,19 +5674,19 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__4(VVortex__Syms* __restrict vlSymsp)
 	}
     }
     // ALWAYS at VX_register_file_slave.v:53
-    if ((((((0U != (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
-			   << 0x18U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+    if ((((((0U != (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			   << 0x18U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					>> 8U)))) & 
-	    (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
-			      << 0x16U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+	    (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			      << 0x16U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					   >> 0xaU))))) 
-	   & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] 
-	      >> 6U)) & (0U == (0xfU & vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U]))) 
+	   & (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] 
+	      >> 6U)) & (0U == (0xfU & vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U]))) 
 	 & (~ (IData)(vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__real_zero_isclone)))) {
-	VL_ASSIGNSEL_WIII(32,(0x3e0U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+	VL_ASSIGNSEL_WIII(32,(0x3e0U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
 					 << 0x1bU) 
 					| (0x7ffffe0U 
-					   & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+					   & (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					      >> 5U)))), vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers, 
 			  vlSymsp->TOP__Vortex__DOT__VX_writeback_inter.write_data[2U]);
     } else {
@@ -5762,19 +5763,19 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__4(VVortex__Syms* __restrict vlSymsp)
 	}
     }
     // ALWAYS at VX_register_file_slave.v:53
-    if ((((((0U != (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
-			   << 0x18U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+    if ((((((0U != (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			   << 0x18U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					>> 8U)))) & 
-	    (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
-			      << 0x16U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+	    (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			      << 0x16U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					   >> 0xaU))))) 
-	   & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] 
-	      >> 5U)) & (0U == (0xfU & vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U]))) 
+	   & (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] 
+	      >> 5U)) & (0U == (0xfU & vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U]))) 
 	 & (~ (IData)(vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__real_zero_isclone)))) {
-	VL_ASSIGNSEL_WIII(32,(0x3e0U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+	VL_ASSIGNSEL_WIII(32,(0x3e0U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
 					 << 0x1bU) 
 					| (0x7ffffe0U 
-					   & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+					   & (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					      >> 5U)))), vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__VX_Context_zero__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers, 
 			  vlSymsp->TOP__Vortex__DOT__VX_writeback_inter.write_data[1U]);
     } else {
@@ -5851,19 +5852,19 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__4(VVortex__Syms* __restrict vlSymsp)
 	}
     }
     // ALWAYS at VX_register_file_slave.v:53
-    if ((((((0U != (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
-			   << 0x18U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+    if ((((((0U != (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			   << 0x18U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					>> 8U)))) & 
-	    (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
-			      << 0x16U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+	    (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			      << 0x16U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					   >> 0xaU))))) 
-	   & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] 
-	      >> 7U)) & (7U == (0xfU & vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U]))) 
+	   & (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] 
+	      >> 7U)) & (7U == (0xfU & vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U]))) 
 	 & (~ (IData)(vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__genblk2__BRA__7__KET____DOT__real_isclone)))) {
-	VL_ASSIGNSEL_WIII(32,(0x3e0U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+	VL_ASSIGNSEL_WIII(32,(0x3e0U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
 					 << 0x1bU) 
 					| (0x7ffffe0U 
-					   & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+					   & (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					      >> 5U)))), vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__genblk2__BRA__7__KET____DOT__VX_Context_one__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers, 
 			  vlSymsp->TOP__Vortex__DOT__VX_writeback_inter.write_data[3U]);
     } else {
@@ -5940,19 +5941,19 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__4(VVortex__Syms* __restrict vlSymsp)
 	}
     }
     // ALWAYS at VX_register_file_slave.v:53
-    if ((((((0U != (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
-			   << 0x18U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+    if ((((((0U != (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			   << 0x18U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					>> 8U)))) & 
-	    (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
-			      << 0x16U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+	    (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			      << 0x16U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					   >> 0xaU))))) 
-	   & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] 
-	      >> 6U)) & (7U == (0xfU & vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U]))) 
+	   & (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] 
+	      >> 6U)) & (7U == (0xfU & vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U]))) 
 	 & (~ (IData)(vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__genblk2__BRA__7__KET____DOT__real_isclone)))) {
-	VL_ASSIGNSEL_WIII(32,(0x3e0U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+	VL_ASSIGNSEL_WIII(32,(0x3e0U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
 					 << 0x1bU) 
 					| (0x7ffffe0U 
-					   & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+					   & (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					      >> 5U)))), vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__genblk2__BRA__7__KET____DOT__VX_Context_one__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers, 
 			  vlSymsp->TOP__Vortex__DOT__VX_writeback_inter.write_data[2U]);
     } else {
@@ -6029,19 +6030,19 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__4(VVortex__Syms* __restrict vlSymsp)
 	}
     }
     // ALWAYS at VX_register_file_slave.v:53
-    if ((((((0U != (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
-			   << 0x18U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+    if ((((((0U != (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			   << 0x18U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					>> 8U)))) & 
-	    (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
-			      << 0x16U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+	    (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			      << 0x16U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					   >> 0xaU))))) 
-	   & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] 
-	      >> 5U)) & (7U == (0xfU & vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U]))) 
+	   & (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] 
+	      >> 5U)) & (7U == (0xfU & vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U]))) 
 	 & (~ (IData)(vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__genblk2__BRA__7__KET____DOT__real_isclone)))) {
-	VL_ASSIGNSEL_WIII(32,(0x3e0U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+	VL_ASSIGNSEL_WIII(32,(0x3e0U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
 					 << 0x1bU) 
 					| (0x7ffffe0U 
-					   & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+					   & (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					      >> 5U)))), vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__genblk2__BRA__7__KET____DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers, 
 			  vlSymsp->TOP__Vortex__DOT__VX_writeback_inter.write_data[1U]);
     } else {
@@ -6118,19 +6119,19 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__4(VVortex__Syms* __restrict vlSymsp)
 	}
     }
     // ALWAYS at VX_register_file_slave.v:53
-    if ((((((0U != (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
-			   << 0x18U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+    if ((((((0U != (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			   << 0x18U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					>> 8U)))) & 
-	    (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
-			      << 0x16U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+	    (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			      << 0x16U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					   >> 0xaU))))) 
-	   & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] 
-	      >> 7U)) & (6U == (0xfU & vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U]))) 
+	   & (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] 
+	      >> 7U)) & (6U == (0xfU & vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U]))) 
 	 & (~ (IData)(vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__genblk2__BRA__6__KET____DOT__real_isclone)))) {
-	VL_ASSIGNSEL_WIII(32,(0x3e0U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+	VL_ASSIGNSEL_WIII(32,(0x3e0U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
 					 << 0x1bU) 
 					| (0x7ffffe0U 
-					   & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+					   & (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					      >> 5U)))), vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__genblk2__BRA__6__KET____DOT__VX_Context_one__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers, 
 			  vlSymsp->TOP__Vortex__DOT__VX_writeback_inter.write_data[3U]);
     } else {
@@ -6207,19 +6208,19 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__4(VVortex__Syms* __restrict vlSymsp)
 	}
     }
     // ALWAYS at VX_register_file_slave.v:53
-    if ((((((0U != (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
-			   << 0x18U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+    if ((((((0U != (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			   << 0x18U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					>> 8U)))) & 
-	    (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
-			      << 0x16U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+	    (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			      << 0x16U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					   >> 0xaU))))) 
-	   & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] 
-	      >> 6U)) & (6U == (0xfU & vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U]))) 
+	   & (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] 
+	      >> 6U)) & (6U == (0xfU & vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U]))) 
 	 & (~ (IData)(vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__genblk2__BRA__6__KET____DOT__real_isclone)))) {
-	VL_ASSIGNSEL_WIII(32,(0x3e0U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+	VL_ASSIGNSEL_WIII(32,(0x3e0U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
 					 << 0x1bU) 
 					| (0x7ffffe0U 
-					   & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+					   & (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					      >> 5U)))), vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__genblk2__BRA__6__KET____DOT__VX_Context_one__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers, 
 			  vlSymsp->TOP__Vortex__DOT__VX_writeback_inter.write_data[2U]);
     } else {
@@ -6296,19 +6297,19 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__4(VVortex__Syms* __restrict vlSymsp)
 	}
     }
     // ALWAYS at VX_register_file_slave.v:53
-    if ((((((0U != (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
-			   << 0x18U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+    if ((((((0U != (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			   << 0x18U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					>> 8U)))) & 
-	    (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
-			      << 0x16U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+	    (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			      << 0x16U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					   >> 0xaU))))) 
-	   & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] 
-	      >> 5U)) & (6U == (0xfU & vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U]))) 
+	   & (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] 
+	      >> 5U)) & (6U == (0xfU & vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U]))) 
 	 & (~ (IData)(vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__genblk2__BRA__6__KET____DOT__real_isclone)))) {
-	VL_ASSIGNSEL_WIII(32,(0x3e0U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+	VL_ASSIGNSEL_WIII(32,(0x3e0U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
 					 << 0x1bU) 
 					| (0x7ffffe0U 
-					   & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+					   & (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					      >> 5U)))), vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__genblk2__BRA__6__KET____DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers, 
 			  vlSymsp->TOP__Vortex__DOT__VX_writeback_inter.write_data[1U]);
     } else {
@@ -6385,19 +6386,19 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__4(VVortex__Syms* __restrict vlSymsp)
 	}
     }
     // ALWAYS at VX_register_file_slave.v:53
-    if ((((((0U != (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
-			   << 0x18U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+    if ((((((0U != (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			   << 0x18U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					>> 8U)))) & 
-	    (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
-			      << 0x16U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+	    (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			      << 0x16U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					   >> 0xaU))))) 
-	   & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] 
-	      >> 7U)) & (5U == (0xfU & vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U]))) 
+	   & (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] 
+	      >> 7U)) & (5U == (0xfU & vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U]))) 
 	 & (~ (IData)(vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__genblk2__BRA__5__KET____DOT__real_isclone)))) {
-	VL_ASSIGNSEL_WIII(32,(0x3e0U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+	VL_ASSIGNSEL_WIII(32,(0x3e0U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
 					 << 0x1bU) 
 					| (0x7ffffe0U 
-					   & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+					   & (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					      >> 5U)))), vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__genblk2__BRA__5__KET____DOT__VX_Context_one__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers, 
 			  vlSymsp->TOP__Vortex__DOT__VX_writeback_inter.write_data[3U]);
     } else {
@@ -6474,19 +6475,19 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__4(VVortex__Syms* __restrict vlSymsp)
 	}
     }
     // ALWAYS at VX_register_file_slave.v:53
-    if ((((((0U != (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
-			   << 0x18U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+    if ((((((0U != (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			   << 0x18U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					>> 8U)))) & 
-	    (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
-			      << 0x16U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+	    (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			      << 0x16U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					   >> 0xaU))))) 
-	   & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] 
-	      >> 6U)) & (5U == (0xfU & vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U]))) 
+	   & (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] 
+	      >> 6U)) & (5U == (0xfU & vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U]))) 
 	 & (~ (IData)(vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__genblk2__BRA__5__KET____DOT__real_isclone)))) {
-	VL_ASSIGNSEL_WIII(32,(0x3e0U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+	VL_ASSIGNSEL_WIII(32,(0x3e0U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
 					 << 0x1bU) 
 					| (0x7ffffe0U 
-					   & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+					   & (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					      >> 5U)))), vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__genblk2__BRA__5__KET____DOT__VX_Context_one__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers, 
 			  vlSymsp->TOP__Vortex__DOT__VX_writeback_inter.write_data[2U]);
     } else {
@@ -6563,19 +6564,19 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__4(VVortex__Syms* __restrict vlSymsp)
 	}
     }
     // ALWAYS at VX_register_file_slave.v:53
-    if ((((((0U != (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
-			   << 0x18U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+    if ((((((0U != (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			   << 0x18U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					>> 8U)))) & 
-	    (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
-			      << 0x16U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+	    (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			      << 0x16U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					   >> 0xaU))))) 
-	   & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] 
-	      >> 5U)) & (5U == (0xfU & vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U]))) 
+	   & (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] 
+	      >> 5U)) & (5U == (0xfU & vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U]))) 
 	 & (~ (IData)(vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__genblk2__BRA__5__KET____DOT__real_isclone)))) {
-	VL_ASSIGNSEL_WIII(32,(0x3e0U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+	VL_ASSIGNSEL_WIII(32,(0x3e0U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
 					 << 0x1bU) 
 					| (0x7ffffe0U 
-					   & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+					   & (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					      >> 5U)))), vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__genblk2__BRA__5__KET____DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers, 
 			  vlSymsp->TOP__Vortex__DOT__VX_writeback_inter.write_data[1U]);
     } else {
@@ -6652,19 +6653,19 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__4(VVortex__Syms* __restrict vlSymsp)
 	}
     }
     // ALWAYS at VX_register_file_slave.v:53
-    if ((((((0U != (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
-			   << 0x18U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+    if ((((((0U != (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			   << 0x18U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					>> 8U)))) & 
-	    (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
-			      << 0x16U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+	    (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			      << 0x16U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					   >> 0xaU))))) 
-	   & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] 
-	      >> 7U)) & (4U == (0xfU & vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U]))) 
+	   & (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] 
+	      >> 7U)) & (4U == (0xfU & vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U]))) 
 	 & (~ (IData)(vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__genblk2__BRA__4__KET____DOT__real_isclone)))) {
-	VL_ASSIGNSEL_WIII(32,(0x3e0U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+	VL_ASSIGNSEL_WIII(32,(0x3e0U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
 					 << 0x1bU) 
 					| (0x7ffffe0U 
-					   & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+					   & (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					      >> 5U)))), vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__genblk2__BRA__4__KET____DOT__VX_Context_one__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers, 
 			  vlSymsp->TOP__Vortex__DOT__VX_writeback_inter.write_data[3U]);
     } else {
@@ -6741,19 +6742,19 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__4(VVortex__Syms* __restrict vlSymsp)
 	}
     }
     // ALWAYS at VX_register_file_slave.v:53
-    if ((((((0U != (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
-			   << 0x18U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+    if ((((((0U != (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			   << 0x18U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					>> 8U)))) & 
-	    (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
-			      << 0x16U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+	    (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			      << 0x16U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					   >> 0xaU))))) 
-	   & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] 
-	      >> 6U)) & (4U == (0xfU & vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U]))) 
+	   & (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] 
+	      >> 6U)) & (4U == (0xfU & vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U]))) 
 	 & (~ (IData)(vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__genblk2__BRA__4__KET____DOT__real_isclone)))) {
-	VL_ASSIGNSEL_WIII(32,(0x3e0U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+	VL_ASSIGNSEL_WIII(32,(0x3e0U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
 					 << 0x1bU) 
 					| (0x7ffffe0U 
-					   & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+					   & (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					      >> 5U)))), vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__genblk2__BRA__4__KET____DOT__VX_Context_one__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers, 
 			  vlSymsp->TOP__Vortex__DOT__VX_writeback_inter.write_data[2U]);
     } else {
@@ -6830,19 +6831,19 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__4(VVortex__Syms* __restrict vlSymsp)
 	}
     }
     // ALWAYS at VX_register_file_slave.v:53
-    if ((((((0U != (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
-			   << 0x18U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+    if ((((((0U != (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			   << 0x18U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					>> 8U)))) & 
-	    (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
-			      << 0x16U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+	    (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			      << 0x16U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					   >> 0xaU))))) 
-	   & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] 
-	      >> 5U)) & (4U == (0xfU & vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U]))) 
+	   & (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] 
+	      >> 5U)) & (4U == (0xfU & vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U]))) 
 	 & (~ (IData)(vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__genblk2__BRA__4__KET____DOT__real_isclone)))) {
-	VL_ASSIGNSEL_WIII(32,(0x3e0U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+	VL_ASSIGNSEL_WIII(32,(0x3e0U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
 					 << 0x1bU) 
 					| (0x7ffffe0U 
-					   & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+					   & (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					      >> 5U)))), vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__genblk2__BRA__4__KET____DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers, 
 			  vlSymsp->TOP__Vortex__DOT__VX_writeback_inter.write_data[1U]);
     } else {
@@ -6919,19 +6920,19 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__4(VVortex__Syms* __restrict vlSymsp)
 	}
     }
     // ALWAYS at VX_register_file_slave.v:53
-    if ((((((0U != (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
-			   << 0x18U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+    if ((((((0U != (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			   << 0x18U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					>> 8U)))) & 
-	    (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
-			      << 0x16U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+	    (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			      << 0x16U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					   >> 0xaU))))) 
-	   & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] 
-	      >> 7U)) & (3U == (0xfU & vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U]))) 
+	   & (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] 
+	      >> 7U)) & (3U == (0xfU & vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U]))) 
 	 & (~ (IData)(vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__genblk2__BRA__3__KET____DOT__real_isclone)))) {
-	VL_ASSIGNSEL_WIII(32,(0x3e0U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+	VL_ASSIGNSEL_WIII(32,(0x3e0U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
 					 << 0x1bU) 
 					| (0x7ffffe0U 
-					   & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+					   & (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					      >> 5U)))), vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__genblk2__BRA__3__KET____DOT__VX_Context_one__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers, 
 			  vlSymsp->TOP__Vortex__DOT__VX_writeback_inter.write_data[3U]);
     } else {
@@ -7008,19 +7009,19 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__4(VVortex__Syms* __restrict vlSymsp)
 	}
     }
     // ALWAYS at VX_register_file_slave.v:53
-    if ((((((0U != (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
-			   << 0x18U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+    if ((((((0U != (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			   << 0x18U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					>> 8U)))) & 
-	    (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
-			      << 0x16U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+	    (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			      << 0x16U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					   >> 0xaU))))) 
-	   & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] 
-	      >> 6U)) & (3U == (0xfU & vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U]))) 
+	   & (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] 
+	      >> 6U)) & (3U == (0xfU & vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U]))) 
 	 & (~ (IData)(vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__genblk2__BRA__3__KET____DOT__real_isclone)))) {
-	VL_ASSIGNSEL_WIII(32,(0x3e0U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+	VL_ASSIGNSEL_WIII(32,(0x3e0U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
 					 << 0x1bU) 
 					| (0x7ffffe0U 
-					   & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+					   & (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					      >> 5U)))), vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__genblk2__BRA__3__KET____DOT__VX_Context_one__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers, 
 			  vlSymsp->TOP__Vortex__DOT__VX_writeback_inter.write_data[2U]);
     } else {
@@ -7097,19 +7098,19 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__4(VVortex__Syms* __restrict vlSymsp)
 	}
     }
     // ALWAYS at VX_register_file_slave.v:53
-    if ((((((0U != (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
-			   << 0x18U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+    if ((((((0U != (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			   << 0x18U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					>> 8U)))) & 
-	    (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
-			      << 0x16U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+	    (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			      << 0x16U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					   >> 0xaU))))) 
-	   & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] 
-	      >> 5U)) & (3U == (0xfU & vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U]))) 
+	   & (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] 
+	      >> 5U)) & (3U == (0xfU & vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U]))) 
 	 & (~ (IData)(vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__genblk2__BRA__3__KET____DOT__real_isclone)))) {
-	VL_ASSIGNSEL_WIII(32,(0x3e0U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+	VL_ASSIGNSEL_WIII(32,(0x3e0U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
 					 << 0x1bU) 
 					| (0x7ffffe0U 
-					   & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+					   & (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					      >> 5U)))), vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__genblk2__BRA__3__KET____DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers, 
 			  vlSymsp->TOP__Vortex__DOT__VX_writeback_inter.write_data[1U]);
     } else {
@@ -7186,19 +7187,19 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__4(VVortex__Syms* __restrict vlSymsp)
 	}
     }
     // ALWAYS at VX_register_file_slave.v:53
-    if ((((((0U != (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
-			   << 0x18U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+    if ((((((0U != (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			   << 0x18U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					>> 8U)))) & 
-	    (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
-			      << 0x16U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+	    (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			      << 0x16U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					   >> 0xaU))))) 
-	   & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] 
-	      >> 7U)) & (2U == (0xfU & vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U]))) 
+	   & (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] 
+	      >> 7U)) & (2U == (0xfU & vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U]))) 
 	 & (~ (IData)(vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__genblk2__BRA__2__KET____DOT__real_isclone)))) {
-	VL_ASSIGNSEL_WIII(32,(0x3e0U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+	VL_ASSIGNSEL_WIII(32,(0x3e0U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
 					 << 0x1bU) 
 					| (0x7ffffe0U 
-					   & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+					   & (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					      >> 5U)))), vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__genblk2__BRA__2__KET____DOT__VX_Context_one__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers, 
 			  vlSymsp->TOP__Vortex__DOT__VX_writeback_inter.write_data[3U]);
     } else {
@@ -7275,19 +7276,19 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__4(VVortex__Syms* __restrict vlSymsp)
 	}
     }
     // ALWAYS at VX_register_file_slave.v:53
-    if ((((((0U != (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
-			   << 0x18U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+    if ((((((0U != (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			   << 0x18U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					>> 8U)))) & 
-	    (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
-			      << 0x16U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+	    (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			      << 0x16U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					   >> 0xaU))))) 
-	   & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] 
-	      >> 6U)) & (2U == (0xfU & vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U]))) 
+	   & (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] 
+	      >> 6U)) & (2U == (0xfU & vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U]))) 
 	 & (~ (IData)(vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__genblk2__BRA__2__KET____DOT__real_isclone)))) {
-	VL_ASSIGNSEL_WIII(32,(0x3e0U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+	VL_ASSIGNSEL_WIII(32,(0x3e0U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
 					 << 0x1bU) 
 					| (0x7ffffe0U 
-					   & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+					   & (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					      >> 5U)))), vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__genblk2__BRA__2__KET____DOT__VX_Context_one__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers, 
 			  vlSymsp->TOP__Vortex__DOT__VX_writeback_inter.write_data[2U]);
     } else {
@@ -7364,19 +7365,19 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__4(VVortex__Syms* __restrict vlSymsp)
 	}
     }
     // ALWAYS at VX_register_file_slave.v:53
-    if ((((((0U != (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
-			   << 0x18U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+    if ((((((0U != (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			   << 0x18U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					>> 8U)))) & 
-	    (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
-			      << 0x16U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+	    (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			      << 0x16U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					   >> 0xaU))))) 
-	   & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] 
-	      >> 5U)) & (2U == (0xfU & vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U]))) 
+	   & (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] 
+	      >> 5U)) & (2U == (0xfU & vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U]))) 
 	 & (~ (IData)(vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__genblk2__BRA__2__KET____DOT__real_isclone)))) {
-	VL_ASSIGNSEL_WIII(32,(0x3e0U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+	VL_ASSIGNSEL_WIII(32,(0x3e0U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
 					 << 0x1bU) 
 					| (0x7ffffe0U 
-					   & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+					   & (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					      >> 5U)))), vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__genblk2__BRA__2__KET____DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers, 
 			  vlSymsp->TOP__Vortex__DOT__VX_writeback_inter.write_data[1U]);
     } else {
@@ -7453,19 +7454,19 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__4(VVortex__Syms* __restrict vlSymsp)
 	}
     }
     // ALWAYS at VX_register_file_slave.v:53
-    if ((((((0U != (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
-			   << 0x18U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+    if ((((((0U != (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			   << 0x18U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					>> 8U)))) & 
-	    (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
-			      << 0x16U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+	    (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			      << 0x16U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					   >> 0xaU))))) 
-	   & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] 
-	      >> 7U)) & (1U == (0xfU & vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U]))) 
+	   & (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] 
+	      >> 7U)) & (1U == (0xfU & vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U]))) 
 	 & (~ (IData)(vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__real_isclone)))) {
-	VL_ASSIGNSEL_WIII(32,(0x3e0U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+	VL_ASSIGNSEL_WIII(32,(0x3e0U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
 					 << 0x1bU) 
 					| (0x7ffffe0U 
-					   & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+					   & (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					      >> 5U)))), vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__VX_Context_one__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers, 
 			  vlSymsp->TOP__Vortex__DOT__VX_writeback_inter.write_data[3U]);
     } else {
@@ -7542,19 +7543,19 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__4(VVortex__Syms* __restrict vlSymsp)
 	}
     }
     // ALWAYS at VX_register_file_slave.v:53
-    if ((((((0U != (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
-			   << 0x18U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+    if ((((((0U != (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			   << 0x18U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					>> 8U)))) & 
-	    (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
-			      << 0x16U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+	    (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			      << 0x16U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					   >> 0xaU))))) 
-	   & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] 
-	      >> 6U)) & (1U == (0xfU & vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U]))) 
+	   & (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] 
+	      >> 6U)) & (1U == (0xfU & vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U]))) 
 	 & (~ (IData)(vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__real_isclone)))) {
-	VL_ASSIGNSEL_WIII(32,(0x3e0U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+	VL_ASSIGNSEL_WIII(32,(0x3e0U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
 					 << 0x1bU) 
 					| (0x7ffffe0U 
-					   & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+					   & (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					      >> 5U)))), vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__VX_Context_one__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers, 
 			  vlSymsp->TOP__Vortex__DOT__VX_writeback_inter.write_data[2U]);
     } else {
@@ -7631,19 +7632,19 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__4(VVortex__Syms* __restrict vlSymsp)
 	}
     }
     // ALWAYS at VX_register_file_slave.v:53
-    if ((((((0U != (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
-			   << 0x18U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+    if ((((((0U != (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			   << 0x18U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					>> 8U)))) & 
-	    (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
-			      << 0x16U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+	    (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			      << 0x16U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					   >> 0xaU))))) 
-	   & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] 
-	      >> 5U)) & (1U == (0xfU & vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U]))) 
+	   & (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] 
+	      >> 5U)) & (1U == (0xfU & vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U]))) 
 	 & (~ (IData)(vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__real_isclone)))) {
-	VL_ASSIGNSEL_WIII(32,(0x3e0U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+	VL_ASSIGNSEL_WIII(32,(0x3e0U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
 					 << 0x1bU) 
 					| (0x7ffffe0U 
-					   & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+					   & (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					      >> 5U)))), vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__VX_Context_one__DOT__gen_code_label__BRA__1__KET____DOT__vx_register_file_slave__DOT__registers, 
 			  vlSymsp->TOP__Vortex__DOT__VX_writeback_inter.write_data[1U]);
     } else {
@@ -7736,19 +7737,19 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__4(VVortex__Syms* __restrict vlSymsp)
     vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__VX_Context_one__DOT__clone_state_stall 
 	= __Vdly__Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__VX_Context_one__DOT__clone_state_stall;
     // ALWAYS at VX_register_file_master_slave.v:50
-    if ((((((0U != (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
-			   << 0x18U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+    if ((((((0U != (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			   << 0x18U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					>> 8U)))) & 
-	    (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
-			      << 0x16U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+	    (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			      << 0x16U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					   >> 0xaU))))) 
-	   & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] 
-	      >> 4U)) & (7U == (0xfU & vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U]))) 
+	   & (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] 
+	      >> 4U)) & (7U == (0xfU & vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U]))) 
 	 & (~ (IData)(vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__genblk2__BRA__7__KET____DOT__real_wspawn)))) {
-	VL_ASSIGNSEL_WIII(32,(0x3e0U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+	VL_ASSIGNSEL_WIII(32,(0x3e0U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
 					 << 0x1bU) 
 					| (0x7ffffe0U 
-					   & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+					   & (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					      >> 5U)))), vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__genblk2__BRA__7__KET____DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers, 
 			  vlSymsp->TOP__Vortex__DOT__VX_writeback_inter.write_data[0U]);
     } else {
@@ -7821,19 +7822,19 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__4(VVortex__Syms* __restrict vlSymsp)
 	}
     }
     // ALWAYS at VX_register_file_master_slave.v:50
-    if ((((((0U != (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
-			   << 0x18U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+    if ((((((0U != (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			   << 0x18U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					>> 8U)))) & 
-	    (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
-			      << 0x16U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+	    (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			      << 0x16U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					   >> 0xaU))))) 
-	   & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] 
-	      >> 4U)) & (6U == (0xfU & vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U]))) 
+	   & (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] 
+	      >> 4U)) & (6U == (0xfU & vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U]))) 
 	 & (~ (IData)(vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__genblk2__BRA__6__KET____DOT__real_wspawn)))) {
-	VL_ASSIGNSEL_WIII(32,(0x3e0U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+	VL_ASSIGNSEL_WIII(32,(0x3e0U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
 					 << 0x1bU) 
 					| (0x7ffffe0U 
-					   & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+					   & (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					      >> 5U)))), vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__genblk2__BRA__6__KET____DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers, 
 			  vlSymsp->TOP__Vortex__DOT__VX_writeback_inter.write_data[0U]);
     } else {
@@ -7906,19 +7907,19 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__4(VVortex__Syms* __restrict vlSymsp)
 	}
     }
     // ALWAYS at VX_register_file_master_slave.v:50
-    if ((((((0U != (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
-			   << 0x18U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+    if ((((((0U != (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			   << 0x18U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					>> 8U)))) & 
-	    (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
-			      << 0x16U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+	    (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			      << 0x16U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					   >> 0xaU))))) 
-	   & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] 
-	      >> 4U)) & (5U == (0xfU & vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U]))) 
+	   & (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] 
+	      >> 4U)) & (5U == (0xfU & vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U]))) 
 	 & (~ (IData)(vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__genblk2__BRA__5__KET____DOT__real_wspawn)))) {
-	VL_ASSIGNSEL_WIII(32,(0x3e0U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+	VL_ASSIGNSEL_WIII(32,(0x3e0U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
 					 << 0x1bU) 
 					| (0x7ffffe0U 
-					   & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+					   & (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					      >> 5U)))), vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__genblk2__BRA__5__KET____DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers, 
 			  vlSymsp->TOP__Vortex__DOT__VX_writeback_inter.write_data[0U]);
     } else {
@@ -7991,19 +7992,19 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__4(VVortex__Syms* __restrict vlSymsp)
 	}
     }
     // ALWAYS at VX_register_file_master_slave.v:50
-    if ((((((0U != (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
-			   << 0x18U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+    if ((((((0U != (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			   << 0x18U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					>> 8U)))) & 
-	    (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
-			      << 0x16U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+	    (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			      << 0x16U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					   >> 0xaU))))) 
-	   & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] 
-	      >> 4U)) & (4U == (0xfU & vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U]))) 
+	   & (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] 
+	      >> 4U)) & (4U == (0xfU & vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U]))) 
 	 & (~ (IData)(vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__genblk2__BRA__4__KET____DOT__real_wspawn)))) {
-	VL_ASSIGNSEL_WIII(32,(0x3e0U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+	VL_ASSIGNSEL_WIII(32,(0x3e0U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
 					 << 0x1bU) 
 					| (0x7ffffe0U 
-					   & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+					   & (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					      >> 5U)))), vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__genblk2__BRA__4__KET____DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers, 
 			  vlSymsp->TOP__Vortex__DOT__VX_writeback_inter.write_data[0U]);
     } else {
@@ -8076,19 +8077,19 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__4(VVortex__Syms* __restrict vlSymsp)
 	}
     }
     // ALWAYS at VX_register_file_master_slave.v:50
-    if ((((((0U != (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
-			   << 0x18U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+    if ((((((0U != (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			   << 0x18U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					>> 8U)))) & 
-	    (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
-			      << 0x16U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+	    (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			      << 0x16U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					   >> 0xaU))))) 
-	   & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] 
-	      >> 4U)) & (3U == (0xfU & vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U]))) 
+	   & (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] 
+	      >> 4U)) & (3U == (0xfU & vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U]))) 
 	 & (~ (IData)(vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__genblk2__BRA__3__KET____DOT__real_wspawn)))) {
-	VL_ASSIGNSEL_WIII(32,(0x3e0U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+	VL_ASSIGNSEL_WIII(32,(0x3e0U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
 					 << 0x1bU) 
 					| (0x7ffffe0U 
-					   & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+					   & (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					      >> 5U)))), vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__genblk2__BRA__3__KET____DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers, 
 			  vlSymsp->TOP__Vortex__DOT__VX_writeback_inter.write_data[0U]);
     } else {
@@ -8161,19 +8162,19 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__4(VVortex__Syms* __restrict vlSymsp)
 	}
     }
     // ALWAYS at VX_register_file_master_slave.v:50
-    if ((((((0U != (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
-			   << 0x18U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+    if ((((((0U != (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			   << 0x18U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					>> 8U)))) & 
-	    (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
-			      << 0x16U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+	    (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			      << 0x16U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					   >> 0xaU))))) 
-	   & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] 
-	      >> 4U)) & (2U == (0xfU & vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U]))) 
+	   & (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] 
+	      >> 4U)) & (2U == (0xfU & vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U]))) 
 	 & (~ (IData)(vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__genblk2__BRA__2__KET____DOT__real_wspawn)))) {
-	VL_ASSIGNSEL_WIII(32,(0x3e0U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+	VL_ASSIGNSEL_WIII(32,(0x3e0U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
 					 << 0x1bU) 
 					| (0x7ffffe0U 
-					   & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+					   & (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					      >> 5U)))), vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__genblk2__BRA__2__KET____DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers, 
 			  vlSymsp->TOP__Vortex__DOT__VX_writeback_inter.write_data[0U]);
     } else {
@@ -8246,19 +8247,19 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__4(VVortex__Syms* __restrict vlSymsp)
 	}
     }
     // ALWAYS at VX_register_file_master_slave.v:50
-    if ((((((0U != (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
-			   << 0x18U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+    if ((((((0U != (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			   << 0x18U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					>> 8U)))) & 
-	    (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
-			      << 0x16U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+	    (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			      << 0x16U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					   >> 0xaU))))) 
-	   & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] 
-	      >> 4U)) & (1U == (0xfU & vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U]))) 
+	   & (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] 
+	      >> 4U)) & (1U == (0xfU & vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U]))) 
 	 & (~ (IData)(vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__real_wspawn)))) {
-	VL_ASSIGNSEL_WIII(32,(0x3e0U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+	VL_ASSIGNSEL_WIII(32,(0x3e0U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
 					 << 0x1bU) 
 					| (0x7ffffe0U 
-					   & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+					   & (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					      >> 5U)))), vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__VX_Context_one__DOT__vx_register_file_master__DOT__registers, 
 			  vlSymsp->TOP__Vortex__DOT__VX_writeback_inter.write_data[0U]);
     } else {
@@ -8345,18 +8346,18 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__4(VVortex__Syms* __restrict vlSymsp)
     vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__VX_Context_one__DOT__wspawn_state_stall 
 	= __Vdly__Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__genblk2__BRA__1__KET____DOT__VX_Context_one__DOT__wspawn_state_stall;
     // ALWAYS at VX_register_file.v:45
-    if (((((0U != (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
-			  << 0x18U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+    if (((((0U != (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			  << 0x18U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 				       >> 8U)))) & 
-	   (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
-			     << 0x16U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+	   (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			     << 0x16U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					  >> 0xaU))))) 
-	  & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] 
-	     >> 4U)) & (0U == (0xfU & vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U])))) {
-	VL_ASSIGNSEL_WIII(32,(0x3e0U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+	  & (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] 
+	     >> 4U)) & (0U == (0xfU & vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U])))) {
+	VL_ASSIGNSEL_WIII(32,(0x3e0U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
 					 << 0x1bU) 
 					| (0x7ffffe0U 
-					   & (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+					   & (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					      >> 5U)))), vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__VX_Context_zero__DOT__vx_register_file_master__DOT__registers, 
 			  vlSymsp->TOP__Vortex__DOT__VX_writeback_inter.write_data[0U]);
     }
@@ -8366,13 +8367,13 @@ VL_INLINE_OPT void VVortex::_combo__TOP__5(VVortex__Syms* __restrict vlSymsp) {
     VL_DEBUG_IF(VL_DBG_MSGF("+    VVortex::_combo__TOP__5\n"); );
     VVortex* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp;
     // Body
-    vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_cache_driver_out_data[3U] 
+    vlSymsp->TOP__Vortex__DOT__VX_dcache_rsp.in_cache_driver_out_data[3U] 
 	= vlTOPp->in_cache_driver_out_data[3U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_cache_driver_out_data[2U] 
+    vlSymsp->TOP__Vortex__DOT__VX_dcache_rsp.in_cache_driver_out_data[2U] 
 	= vlTOPp->in_cache_driver_out_data[2U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_cache_driver_out_data[1U] 
+    vlSymsp->TOP__Vortex__DOT__VX_dcache_rsp.in_cache_driver_out_data[1U] 
 	= vlTOPp->in_cache_driver_out_data[1U];
-    vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_cache_driver_out_data[0U] 
+    vlSymsp->TOP__Vortex__DOT__VX_dcache_rsp.in_cache_driver_out_data[0U] 
 	= vlTOPp->in_cache_driver_out_data[0U];
 }
 
@@ -8394,7 +8395,7 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__6(VVortex__Syms* __restrict vlSymsp)
 				 << 4U)) | (0xfU & 
 					    (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] 
 					     >> 0x1cU))))];
-    // ALWAYS at VX_csr_handler.v:50
+    // ALWAYS at VX_csr_handler.v:57
     vlTOPp->Vortex__DOT__vx_csr_handler__DOT__data_read 
 	= (0xfffU & ((0x300bU >= (0x3fffU & ((IData)(0xcU) 
 					     * (IData)(vlTOPp->Vortex__DOT__vx_csr_handler__DOT__decode_csr_address))))
@@ -8984,123 +8985,123 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__7(VVortex__Syms* __restrict vlSymsp)
     VVortex* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp;
     // Body
     // ALWAYS at VX_generic_register.v:20
-    vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] 
+    vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] 
 	= ((IData)(vlTOPp->reset) ? 0U : (IData)((((QData)((IData)(
 								   (0x1fU 
-								    & ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
+								    & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
 									<< 9U) 
-								       | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] 
+								       | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] 
 									  >> 0x17U))))) 
 						   << 0x2aU) 
 						  | (((QData)((IData)(
 								      (3U 
-								       & ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
+								       & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
 									   << 0xbU) 
-									  | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] 
+									  | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] 
 									     >> 0x15U))))) 
 						      << 0x28U) 
 						     | (((QData)((IData)(
-									 ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[3U] 
+									 ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[3U] 
 									   << 0x15U) 
-									  | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[2U] 
+									  | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[2U] 
 									     >> 0xbU)))) 
 							 << 8U) 
 							| (QData)((IData)(
 									  (0xffU 
-									   & vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U]))))))));
-    vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+									   & vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U]))))))));
+    vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 	= ((IData)(vlTOPp->reset) ? 0U : ((0xffff8000U 
-					   & (vlSymsp->TOP__Vortex__DOT__VX_mem_wb.mem_result[0U] 
+					   & (vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_mem_wb.mem_result[0U] 
 					      << 0xfU)) 
 					  | (IData)(
 						    ((((QData)((IData)(
 								       (0x1fU 
-									& ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
+									& ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
 									    << 9U) 
-									   | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] 
+									   | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] 
 									      >> 0x17U))))) 
 						       << 0x2aU) 
 						      | (((QData)((IData)(
 									  (3U 
-									   & ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
+									   & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
 									       << 0xbU) 
-									      | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] 
+									      | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] 
 										>> 0x15U))))) 
 							  << 0x28U) 
 							 | (((QData)((IData)(
-									     ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[3U] 
+									     ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[3U] 
 									       << 0x15U) 
-									      | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[2U] 
+									      | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[2U] 
 										>> 0xbU)))) 
 							     << 8U) 
 							    | (QData)((IData)(
 									      (0xffU 
-									       & vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])))))) 
+									       & vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])))))) 
 						     >> 0x20U))));
-    vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+    vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
 	= ((IData)(vlTOPp->reset) ? 0U : ((0x7fffU 
-					   & (vlSymsp->TOP__Vortex__DOT__VX_mem_wb.mem_result[0U] 
+					   & (vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_mem_wb.mem_result[0U] 
 					      >> 0x11U)) 
 					  | (0xffff8000U 
-					     & (vlSymsp->TOP__Vortex__DOT__VX_mem_wb.mem_result[1U] 
+					     & (vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_mem_wb.mem_result[1U] 
 						<< 0xfU))));
-    vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[3U] 
+    vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[3U] 
 	= ((IData)(vlTOPp->reset) ? 0U : ((0x7fffU 
-					   & (vlSymsp->TOP__Vortex__DOT__VX_mem_wb.mem_result[1U] 
+					   & (vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_mem_wb.mem_result[1U] 
 					      >> 0x11U)) 
 					  | (0xffff8000U 
-					     & (vlSymsp->TOP__Vortex__DOT__VX_mem_wb.mem_result[2U] 
+					     & (vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_mem_wb.mem_result[2U] 
 						<< 0xfU))));
-    vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[4U] 
+    vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[4U] 
 	= ((IData)(vlTOPp->reset) ? 0U : ((0x7fffU 
-					   & (vlSymsp->TOP__Vortex__DOT__VX_mem_wb.mem_result[2U] 
+					   & (vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_mem_wb.mem_result[2U] 
 					      >> 0x11U)) 
 					  | (0xffff8000U 
-					     & (vlSymsp->TOP__Vortex__DOT__VX_mem_wb.mem_result[3U] 
+					     & (vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_mem_wb.mem_result[3U] 
 						<< 0xfU))));
-    vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[5U] 
+    vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[5U] 
 	= ((IData)(vlTOPp->reset) ? 0U : ((0x7fffU 
-					   & (vlSymsp->TOP__Vortex__DOT__VX_mem_wb.mem_result[3U] 
+					   & (vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_mem_wb.mem_result[3U] 
 					      >> 0x11U)) 
 					  | (0xffff8000U 
-					     & (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
+					     & (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
 						<< 0xdU))));
-    vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[6U] 
+    vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[6U] 
 	= ((IData)(vlTOPp->reset) ? 0U : ((0x7fffU 
 					   & ((0x6000U 
-					       & (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[9U] 
+					       & (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[9U] 
 						  << 0xdU)) 
-					      | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
+					      | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
 						 >> 0x13U))) 
 					  | (0xffff8000U 
-					     & (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[9U] 
+					     & (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[9U] 
 						<< 0xdU))));
-    vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[7U] 
+    vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[7U] 
 	= ((IData)(vlTOPp->reset) ? 0U : ((0x7fffU 
 					   & ((0x6000U 
-					       & (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xaU] 
+					       & (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xaU] 
 						  << 0xdU)) 
-					      | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[9U] 
+					      | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[9U] 
 						 >> 0x13U))) 
 					  | (0xffff8000U 
-					     & (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xaU] 
+					     & (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xaU] 
 						<< 0xdU))));
-    vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[8U] 
+    vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[8U] 
 	= ((IData)(vlTOPp->reset) ? 0U : ((0x7fffU 
 					   & ((0x6000U 
-					       & (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xbU] 
+					       & (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xbU] 
 						  << 0xdU)) 
-					      | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xaU] 
+					      | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xaU] 
 						 >> 0x13U))) 
 					  | (0xffff8000U 
-					     & (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xbU] 
+					     & (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xbU] 
 						<< 0xdU))));
-    vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[9U] 
+    vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[9U] 
 	= ((IData)(vlTOPp->reset) ? 0U : (0x7fffU & 
 					  ((0x6000U 
-					    & (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xcU] 
+					    & (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xcU] 
 					       << 0xdU)) 
-					   | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xbU] 
+					   | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xbU] 
 					      >> 0x13U))));
     // ALWAYS at VX_generic_register.v:20
     if (vlTOPp->reset) {
@@ -9147,69 +9148,69 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__7(VVortex__Syms* __restrict vlSymsp)
     }
     vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_fetch__DOT__warp_num 
 	= vlTOPp->__Vdly__Vortex__DOT__vx_front_end__DOT__vx_fetch__DOT__warp_num;
-    vlTOPp->Vortex__DOT__vx_writeback__DOT__out_pc_data[0U] 
-	= ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
-	    << 0x18U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] 
+    vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_writeback__DOT__out_pc_data[0U] 
+	= ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+	    << 0x18U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] 
 			 >> 8U));
-    vlTOPp->Vortex__DOT__vx_writeback__DOT__out_pc_data[1U] 
-	= ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
-	    << 0x18U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] 
+    vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_writeback__DOT__out_pc_data[1U] 
+	= ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+	    << 0x18U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] 
 			 >> 8U));
-    vlTOPp->Vortex__DOT__vx_writeback__DOT__out_pc_data[2U] 
-	= ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
-	    << 0x18U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] 
+    vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_writeback__DOT__out_pc_data[2U] 
+	= ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+	    << 0x18U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] 
 			 >> 8U));
-    vlTOPp->Vortex__DOT__vx_writeback__DOT__out_pc_data[3U] 
-	= ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
-	    << 0x18U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] 
+    vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_writeback__DOT__out_pc_data[3U] 
+	= ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+	    << 0x18U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] 
 			 >> 8U));
     vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next[0U] 
-	= ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
-	    << 0x18U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] 
+	= ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+	    << 0x18U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] 
 			 >> 8U));
     vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next[1U] 
-	= ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
-	    << 0x18U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] 
+	= ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+	    << 0x18U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] 
 			 >> 8U));
     vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next[2U] 
-	= ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
-	    << 0x18U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] 
+	= ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+	    << 0x18U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] 
 			 >> 8U));
     vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next[3U] 
-	= ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
-	    << 0x18U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] 
+	= ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+	    << 0x18U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U] 
 			 >> 8U));
     // ALWAYS at VX_generic_register.v:20
-    vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U] 
-	= ((IData)(vlTOPp->reset) ? 0U : vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[0U]);
-    vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[1U] 
-	= ((IData)(vlTOPp->reset) ? 0U : vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[1U]);
-    vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[2U] 
-	= ((IData)(vlTOPp->reset) ? 0U : vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[2U]);
-    vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[3U] 
-	= ((IData)(vlTOPp->reset) ? 0U : vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[3U]);
-    vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[4U] 
-	= ((IData)(vlTOPp->reset) ? 0U : vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[4U]);
-    vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[5U] 
-	= ((IData)(vlTOPp->reset) ? 0U : vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[5U]);
-    vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[6U] 
-	= ((IData)(vlTOPp->reset) ? 0U : vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[6U]);
-    vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] 
-	= ((IData)(vlTOPp->reset) ? 0U : vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[7U]);
-    vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
-	= ((IData)(vlTOPp->reset) ? 0U : vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[8U]);
-    vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[9U] 
-	= ((IData)(vlTOPp->reset) ? 0U : vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[9U]);
-    vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xaU] 
-	= ((IData)(vlTOPp->reset) ? 0U : vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[0xaU]);
-    vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xbU] 
-	= ((IData)(vlTOPp->reset) ? 0U : vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[0xbU]);
-    vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xcU] 
-	= ((IData)(vlTOPp->reset) ? 0U : vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[0xcU]);
-    vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xdU] 
-	= ((IData)(vlTOPp->reset) ? 0U : vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[0xdU]);
-    vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xeU] 
-	= ((IData)(vlTOPp->reset) ? 0U : vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[0xeU]);
+    vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U] 
+	= ((IData)(vlTOPp->reset) ? 0U : vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[0U]);
+    vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[1U] 
+	= ((IData)(vlTOPp->reset) ? 0U : vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[1U]);
+    vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[2U] 
+	= ((IData)(vlTOPp->reset) ? 0U : vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[2U]);
+    vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[3U] 
+	= ((IData)(vlTOPp->reset) ? 0U : vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[3U]);
+    vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[4U] 
+	= ((IData)(vlTOPp->reset) ? 0U : vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[4U]);
+    vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[5U] 
+	= ((IData)(vlTOPp->reset) ? 0U : vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[5U]);
+    vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[6U] 
+	= ((IData)(vlTOPp->reset) ? 0U : vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[6U]);
+    vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] 
+	= ((IData)(vlTOPp->reset) ? 0U : vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[7U]);
+    vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
+	= ((IData)(vlTOPp->reset) ? 0U : vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[8U]);
+    vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[9U] 
+	= ((IData)(vlTOPp->reset) ? 0U : vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[9U]);
+    vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xaU] 
+	= ((IData)(vlTOPp->reset) ? 0U : vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[0xaU]);
+    vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xbU] 
+	= ((IData)(vlTOPp->reset) ? 0U : vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[0xbU]);
+    vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xcU] 
+	= ((IData)(vlTOPp->reset) ? 0U : vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[0xcU]);
+    vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xdU] 
+	= ((IData)(vlTOPp->reset) ? 0U : vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[0xdU]);
+    vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xeU] 
+	= ((IData)(vlTOPp->reset) ? 0U : vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[0xeU]);
     vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__is_itype 
 	= ((0x13U == (0x7fU & ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] 
 				<< 0x18U) | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] 
@@ -9292,7 +9293,7 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__7(VVortex__Syms* __restrict vlSymsp)
 	     & (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] 
 				 << 9U) | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] 
 					   >> 0x17U))))) 
-	    & (0U != (IData)(vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.wb))) 
+	    & (0U != (IData)(vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_exe_mem_req.wb))) 
 	   & ((0xfU & ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] 
 			<< 0x1cU) | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] 
 				     >> 4U))) == (0xfU 
@@ -9329,66 +9330,66 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__7(VVortex__Syms* __restrict vlSymsp)
 	     & (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] 
 				 << 4U) | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] 
 					   >> 0x1cU))))) 
-	    & (0U != (IData)(vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.wb))) 
+	    & (0U != (IData)(vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_exe_mem_req.wb))) 
 	   & ((0xfU & ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] 
 			<< 0x1cU) | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] 
 				     >> 4U))) == (0xfU 
 						  & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0U])));
     vlSymsp->TOP__Vortex__DOT__VX_writeback_inter.write_data[0U] 
-	= ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
-			  << 0x18U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+	= ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			  << 0x18U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 				       >> 8U)))) ? 
-	   vlTOPp->Vortex__DOT__vx_writeback__DOT__out_pc_data[0U]
-	    : ((1U == (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
-			      << 0x18U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+	   vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_writeback__DOT__out_pc_data[0U]
+	    : ((1U == (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			      << 0x18U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					   >> 8U))))
-	        ? ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[6U] 
-		    << 0x11U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[5U] 
-				 >> 0xfU)) : ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+	        ? ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[6U] 
+		    << 0x11U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[5U] 
+				 >> 0xfU)) : ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
 					       << 0x11U) 
-					      | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+					      | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 						 >> 0xfU))));
     vlSymsp->TOP__Vortex__DOT__VX_writeback_inter.write_data[1U] 
-	= ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
-			  << 0x18U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+	= ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			  << 0x18U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 				       >> 8U)))) ? 
-	   vlTOPp->Vortex__DOT__vx_writeback__DOT__out_pc_data[1U]
-	    : ((1U == (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
-			      << 0x18U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+	   vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_writeback__DOT__out_pc_data[1U]
+	    : ((1U == (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			      << 0x18U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					   >> 8U))))
-	        ? ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[7U] 
-		    << 0x11U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[6U] 
-				 >> 0xfU)) : ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[3U] 
+	        ? ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[7U] 
+		    << 0x11U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[6U] 
+				 >> 0xfU)) : ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[3U] 
 					       << 0x11U) 
-					      | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+					      | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
 						 >> 0xfU))));
     vlSymsp->TOP__Vortex__DOT__VX_writeback_inter.write_data[2U] 
-	= ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
-			  << 0x18U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+	= ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			  << 0x18U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 				       >> 8U)))) ? 
-	   vlTOPp->Vortex__DOT__vx_writeback__DOT__out_pc_data[2U]
-	    : ((1U == (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
-			      << 0x18U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+	   vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_writeback__DOT__out_pc_data[2U]
+	    : ((1U == (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			      << 0x18U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					   >> 8U))))
-	        ? ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[8U] 
-		    << 0x11U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[7U] 
-				 >> 0xfU)) : ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[4U] 
+	        ? ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[8U] 
+		    << 0x11U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[7U] 
+				 >> 0xfU)) : ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[4U] 
 					       << 0x11U) 
-					      | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[3U] 
+					      | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[3U] 
 						 >> 0xfU))));
     vlSymsp->TOP__Vortex__DOT__VX_writeback_inter.write_data[3U] 
-	= ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
-			  << 0x18U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+	= ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			  << 0x18U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 				       >> 8U)))) ? 
-	   vlTOPp->Vortex__DOT__vx_writeback__DOT__out_pc_data[3U]
-	    : ((1U == (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
-			      << 0x18U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+	   vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_writeback__DOT__out_pc_data[3U]
+	    : ((1U == (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			      << 0x18U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					   >> 8U))))
-	        ? ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[9U] 
-		    << 0x11U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[8U] 
-				 >> 0xfU)) : ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[5U] 
+	        ? ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[9U] 
+		    << 0x11U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[8U] 
+				 >> 0xfU)) : ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[5U] 
 					       << 0x11U) 
-					      | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[4U] 
+					      | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[4U] 
 						 >> 0xfU))));
     // ALWAYS at VX_decode.v:463
     vlSymsp->TOP__Vortex__DOT__vx_front_end__DOT__VX_frE_to_bckE_req.itype_immed 
@@ -9846,142 +9847,142 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__7(VVortex__Syms* __restrict vlSymsp)
 			      << 0x1cU) | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] 
 					   >> 4U)))));
     vlTOPp->out_cache_driver_in_mem_read = (7U & ((
-						   vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
+						   vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
 						   << 1U) 
-						  | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] 
+						  | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] 
 						     >> 0x1fU)));
     vlTOPp->out_cache_driver_in_mem_write = (7U & (
-						   (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
+						   (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
 						    << 4U) 
-						   | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] 
+						   | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] 
 						      >> 0x1cU)));
-    vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_address[0U] 
-	= ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[9U] 
-	    << 0x1eU) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
+    vlSymsp->TOP__Vortex__DOT__VX_dcache_req.out_cache_driver_in_address[0U] 
+	= ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[9U] 
+	    << 0x1eU) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
 			 >> 2U));
-    vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_data[0U] 
-	= ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[4U] 
-	    << 0x15U) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[3U] 
+    vlSymsp->TOP__Vortex__DOT__VX_dcache_req.out_cache_driver_in_data[0U] 
+	= ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[4U] 
+	    << 0x15U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[3U] 
 			 >> 0xbU));
-    vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_valid[0U] 
-	= (1U & (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U] 
+    vlSymsp->TOP__Vortex__DOT__VX_dcache_req.out_cache_driver_in_valid[0U] 
+	= (1U & (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U] 
 		 >> 4U));
-    vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_address[1U] 
-	= ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xaU] 
-	    << 0x1eU) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[9U] 
+    vlSymsp->TOP__Vortex__DOT__VX_dcache_req.out_cache_driver_in_address[1U] 
+	= ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xaU] 
+	    << 0x1eU) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[9U] 
 			 >> 2U));
-    vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_data[1U] 
-	= ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[5U] 
-	    << 0x15U) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[4U] 
+    vlSymsp->TOP__Vortex__DOT__VX_dcache_req.out_cache_driver_in_data[1U] 
+	= ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[5U] 
+	    << 0x15U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[4U] 
 			 >> 0xbU));
-    vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_valid[1U] 
-	= (1U & (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U] 
+    vlSymsp->TOP__Vortex__DOT__VX_dcache_req.out_cache_driver_in_valid[1U] 
+	= (1U & (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U] 
 		 >> 5U));
-    vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_address[2U] 
-	= ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xbU] 
-	    << 0x1eU) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xaU] 
+    vlSymsp->TOP__Vortex__DOT__VX_dcache_req.out_cache_driver_in_address[2U] 
+	= ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xbU] 
+	    << 0x1eU) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xaU] 
 			 >> 2U));
-    vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_data[2U] 
-	= ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[6U] 
-	    << 0x15U) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[5U] 
+    vlSymsp->TOP__Vortex__DOT__VX_dcache_req.out_cache_driver_in_data[2U] 
+	= ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[6U] 
+	    << 0x15U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[5U] 
 			 >> 0xbU));
-    vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_valid[2U] 
-	= (1U & (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U] 
+    vlSymsp->TOP__Vortex__DOT__VX_dcache_req.out_cache_driver_in_valid[2U] 
+	= (1U & (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U] 
 		 >> 6U));
-    vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_address[3U] 
-	= ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xcU] 
-	    << 0x1eU) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xbU] 
+    vlSymsp->TOP__Vortex__DOT__VX_dcache_req.out_cache_driver_in_address[3U] 
+	= ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xcU] 
+	    << 0x1eU) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xbU] 
 			 >> 2U));
-    vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_data[3U] 
-	= ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] 
-	    << 0x15U) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[6U] 
+    vlSymsp->TOP__Vortex__DOT__VX_dcache_req.out_cache_driver_in_data[3U] 
+	= ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] 
+	    << 0x15U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[6U] 
 			 >> 0xbU));
-    vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_valid[3U] 
-	= (1U & (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U] 
+    vlSymsp->TOP__Vortex__DOT__VX_dcache_req.out_cache_driver_in_valid[3U] 
+	= (1U & (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U] 
 		 >> 7U));
     vlSymsp->TOP__Vortex__DOT__VX_branch_rsp.branch_dest 
-	= (((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[2U] 
-	     << 0x15U) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[1U] 
-			  >> 0xbU)) + ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[1U] 
+	= (((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[2U] 
+	     << 0x15U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[1U] 
+			  >> 0xbU)) + ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[1U] 
 					<< 0x16U) | 
 				       (0x3ffffeU & 
-					(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U] 
+					(vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U] 
 					 >> 0xaU))));
-    // ALWAYS at VX_memory.v:62
-    vlTOPp->Vortex__DOT__vx_memory__DOT__temp_branch_dir 
-	= (1U & ((0x400U & vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])
-		  ? ((0x200U & vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])
-		      ? ((~ (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U] 
-			     >> 8U)) & (~ (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[9U] 
+    // ALWAYS at VX_memory.v:59
+    vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_memory__DOT__temp_branch_dir 
+	= (1U & ((0x400U & vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])
+		  ? ((0x200U & vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])
+		      ? ((~ (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U] 
+			     >> 8U)) & (~ (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[9U] 
 					   >> 1U)))
-		      : ((0x100U & vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])
-			  ? (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[9U] 
-			     >> 1U) : (~ (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[9U] 
+		      : ((0x100U & vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])
+			  ? (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[9U] 
+			     >> 1U) : (~ (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[9U] 
 					  >> 1U))))
-		  : ((0x200U & vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])
-		      ? ((0x100U & vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])
-			  ? (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[9U] 
-			     >> 1U) : (0U != ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[9U] 
+		  : ((0x200U & vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])
+		      ? ((0x100U & vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])
+			  ? (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[9U] 
+			     >> 1U) : (0U != ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[9U] 
 					       << 0x1eU) 
-					      | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
+					      | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
 						 >> 2U))))
-		      : ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U] 
-			  >> 8U) & (0U == ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[9U] 
+		      : ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U] 
+			  >> 8U) & (0U == ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[9U] 
 					    << 0x1eU) 
-					   | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
+					   | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
 					      >> 2U)))))));
     vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_mem_fwd 
 	= ((((((0x1fU & ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] 
 			  << 9U) | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] 
 				    >> 0x17U))) == 
-	       (0x1fU & ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
-			  << 9U) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] 
+	       (0x1fU & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
+			  << 9U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] 
 				    >> 0x17U)))) & 
 	      (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] 
 				<< 9U) | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] 
 					  >> 0x17U))))) 
-	     & (0U != (3U & ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
-			      << 0xbU) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] 
+	     & (0U != (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
+			      << 0xbU) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] 
 					  >> 0x15U))))) 
 	    & (~ (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_exe_fwd))) 
 	   & ((0xfU & ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] 
 			<< 0x1cU) | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] 
 				     >> 4U))) == (0xfU 
-						  & vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])));
+						  & vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])));
     vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next[0U] 
-	= ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[3U] 
-	    << 0x15U) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[2U] 
+	= ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[3U] 
+	    << 0x15U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[2U] 
 			 >> 0xbU));
     vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next[1U] 
-	= ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[3U] 
-	    << 0x15U) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[2U] 
+	= ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[3U] 
+	    << 0x15U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[2U] 
 			 >> 0xbU));
     vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next[2U] 
-	= ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[3U] 
-	    << 0x15U) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[2U] 
+	= ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[3U] 
+	    << 0x15U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[2U] 
 			 >> 0xbU));
     vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next[3U] 
-	= ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[3U] 
-	    << 0x15U) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[2U] 
+	= ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[3U] 
+	    << 0x15U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[2U] 
 			 >> 0xbU));
     vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_mem_fwd 
 	= ((((((0x1fU & ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] 
 			  << 4U) | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] 
 				    >> 0x1cU))) == 
-	       (0x1fU & ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
-			  << 9U) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] 
+	       (0x1fU & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
+			  << 9U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] 
 				    >> 0x17U)))) & 
 	      (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] 
 				<< 4U) | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] 
 					  >> 0x1cU))))) 
-	     & (0U != (3U & ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
-			      << 0xbU) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] 
+	     & (0U != (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
+			      << 0xbU) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] 
 					  >> 0x15U))))) 
 	    & (~ (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_exe_fwd))) 
 	   & ((0xfU & ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] 
 			<< 0x1cU) | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] 
 				     >> 4U))) == (0xfU 
-						  & vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])));
+						  & vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])));
     vlTOPp->out_ebreak = ((0U == (0xfU & ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] 
 					   << 0x1cU) 
 					  | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] 
@@ -10198,132 +10199,132 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__7(VVortex__Syms* __restrict vlSymsp)
 		   & (IData)(vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__genblk2__BRA__7__KET____DOT__real_wspawn)) 
 		  | (1U < (IData)(vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__genblk2__BRA__7__KET____DOT__VX_Context_one__DOT__wspawn_state_stall)))) 
 	      << 7U));
-    vlTOPp->out_cache_driver_in_address[3U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_address
+    vlTOPp->out_cache_driver_in_address[3U] = vlSymsp->TOP__Vortex__DOT__VX_dcache_req.out_cache_driver_in_address
 	[3U];
-    vlTOPp->out_cache_driver_in_address[2U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_address
+    vlTOPp->out_cache_driver_in_address[2U] = vlSymsp->TOP__Vortex__DOT__VX_dcache_req.out_cache_driver_in_address
 	[2U];
-    vlTOPp->out_cache_driver_in_address[1U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_address
+    vlTOPp->out_cache_driver_in_address[1U] = vlSymsp->TOP__Vortex__DOT__VX_dcache_req.out_cache_driver_in_address
 	[1U];
-    vlTOPp->out_cache_driver_in_address[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_address
+    vlTOPp->out_cache_driver_in_address[0U] = vlSymsp->TOP__Vortex__DOT__VX_dcache_req.out_cache_driver_in_address
 	[0U];
-    vlTOPp->out_cache_driver_in_data[3U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_data
+    vlTOPp->out_cache_driver_in_data[3U] = vlSymsp->TOP__Vortex__DOT__VX_dcache_req.out_cache_driver_in_data
 	[3U];
-    vlTOPp->out_cache_driver_in_data[2U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_data
+    vlTOPp->out_cache_driver_in_data[2U] = vlSymsp->TOP__Vortex__DOT__VX_dcache_req.out_cache_driver_in_data
 	[2U];
-    vlTOPp->out_cache_driver_in_data[1U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_data
+    vlTOPp->out_cache_driver_in_data[1U] = vlSymsp->TOP__Vortex__DOT__VX_dcache_req.out_cache_driver_in_data
 	[1U];
-    vlTOPp->out_cache_driver_in_data[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_data
+    vlTOPp->out_cache_driver_in_data[0U] = vlSymsp->TOP__Vortex__DOT__VX_dcache_req.out_cache_driver_in_data
 	[0U];
-    vlTOPp->out_cache_driver_in_valid[3U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_valid
+    vlTOPp->out_cache_driver_in_valid[3U] = vlSymsp->TOP__Vortex__DOT__VX_dcache_req.out_cache_driver_in_valid
 	[3U];
-    vlTOPp->out_cache_driver_in_valid[2U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_valid
+    vlTOPp->out_cache_driver_in_valid[2U] = vlSymsp->TOP__Vortex__DOT__VX_dcache_req.out_cache_driver_in_valid
 	[2U];
-    vlTOPp->out_cache_driver_in_valid[1U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_valid
+    vlTOPp->out_cache_driver_in_valid[1U] = vlSymsp->TOP__Vortex__DOT__VX_dcache_req.out_cache_driver_in_valid
 	[1U];
-    vlTOPp->out_cache_driver_in_valid[0U] = vlTOPp->Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_valid
+    vlTOPp->out_cache_driver_in_valid[0U] = vlSymsp->TOP__Vortex__DOT__VX_dcache_req.out_cache_driver_in_valid
 	[0U];
     // ALWAYS at VX_warp.v:57
     vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_fetch__DOT__genblk2__BRA__0__KET____DOT__VX_Warp__DOT__temp_PC 
-	= (((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xdU] 
-	     >> 2U) & (0U == (0xfU & vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])))
-	    ? ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xdU] 
-		<< 0x1eU) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xcU] 
-			     >> 2U)) : (((IData)(vlTOPp->Vortex__DOT__vx_memory__DOT__temp_branch_dir) 
+	= (((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xdU] 
+	     >> 2U) & (0U == (0xfU & vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])))
+	    ? ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xdU] 
+		<< 0x1eU) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xcU] 
+			     >> 2U)) : (((IData)(vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_memory__DOT__temp_branch_dir) 
 					 & (0U == (0xfU 
-						   & vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])))
+						   & vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])))
 					 ? vlSymsp->TOP__Vortex__DOT__VX_branch_rsp.branch_dest
 					 : vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_fetch__DOT__genblk2__BRA__0__KET____DOT__VX_Warp__DOT__real_PC));
     // ALWAYS at VX_warp.v:57
     vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_fetch__DOT__genblk2__BRA__1__KET____DOT__VX_Warp__DOT__temp_PC 
-	= (((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xdU] 
-	     >> 2U) & (1U == (0xfU & vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])))
-	    ? ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xdU] 
-		<< 0x1eU) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xcU] 
-			     >> 2U)) : (((IData)(vlTOPp->Vortex__DOT__vx_memory__DOT__temp_branch_dir) 
+	= (((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xdU] 
+	     >> 2U) & (1U == (0xfU & vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])))
+	    ? ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xdU] 
+		<< 0x1eU) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xcU] 
+			     >> 2U)) : (((IData)(vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_memory__DOT__temp_branch_dir) 
 					 & (1U == (0xfU 
-						   & vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])))
+						   & vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])))
 					 ? vlSymsp->TOP__Vortex__DOT__VX_branch_rsp.branch_dest
 					 : vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_fetch__DOT__genblk2__BRA__1__KET____DOT__VX_Warp__DOT__real_PC));
     // ALWAYS at VX_warp.v:57
     vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_fetch__DOT__genblk2__BRA__2__KET____DOT__VX_Warp__DOT__temp_PC 
-	= (((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xdU] 
-	     >> 2U) & (2U == (0xfU & vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])))
-	    ? ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xdU] 
-		<< 0x1eU) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xcU] 
-			     >> 2U)) : (((IData)(vlTOPp->Vortex__DOT__vx_memory__DOT__temp_branch_dir) 
+	= (((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xdU] 
+	     >> 2U) & (2U == (0xfU & vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])))
+	    ? ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xdU] 
+		<< 0x1eU) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xcU] 
+			     >> 2U)) : (((IData)(vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_memory__DOT__temp_branch_dir) 
 					 & (2U == (0xfU 
-						   & vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])))
+						   & vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])))
 					 ? vlSymsp->TOP__Vortex__DOT__VX_branch_rsp.branch_dest
 					 : vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_fetch__DOT__genblk2__BRA__2__KET____DOT__VX_Warp__DOT__real_PC));
     // ALWAYS at VX_warp.v:57
     vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_fetch__DOT__genblk2__BRA__3__KET____DOT__VX_Warp__DOT__temp_PC 
-	= (((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xdU] 
-	     >> 2U) & (3U == (0xfU & vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])))
-	    ? ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xdU] 
-		<< 0x1eU) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xcU] 
-			     >> 2U)) : (((IData)(vlTOPp->Vortex__DOT__vx_memory__DOT__temp_branch_dir) 
+	= (((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xdU] 
+	     >> 2U) & (3U == (0xfU & vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])))
+	    ? ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xdU] 
+		<< 0x1eU) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xcU] 
+			     >> 2U)) : (((IData)(vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_memory__DOT__temp_branch_dir) 
 					 & (3U == (0xfU 
-						   & vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])))
+						   & vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])))
 					 ? vlSymsp->TOP__Vortex__DOT__VX_branch_rsp.branch_dest
 					 : vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_fetch__DOT__genblk2__BRA__3__KET____DOT__VX_Warp__DOT__real_PC));
     // ALWAYS at VX_warp.v:57
     vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_fetch__DOT__genblk2__BRA__4__KET____DOT__VX_Warp__DOT__temp_PC 
-	= (((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xdU] 
-	     >> 2U) & (4U == (0xfU & vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])))
-	    ? ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xdU] 
-		<< 0x1eU) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xcU] 
-			     >> 2U)) : (((IData)(vlTOPp->Vortex__DOT__vx_memory__DOT__temp_branch_dir) 
+	= (((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xdU] 
+	     >> 2U) & (4U == (0xfU & vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])))
+	    ? ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xdU] 
+		<< 0x1eU) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xcU] 
+			     >> 2U)) : (((IData)(vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_memory__DOT__temp_branch_dir) 
 					 & (4U == (0xfU 
-						   & vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])))
+						   & vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])))
 					 ? vlSymsp->TOP__Vortex__DOT__VX_branch_rsp.branch_dest
 					 : vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_fetch__DOT__genblk2__BRA__4__KET____DOT__VX_Warp__DOT__real_PC));
     // ALWAYS at VX_warp.v:57
     vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_fetch__DOT__genblk2__BRA__5__KET____DOT__VX_Warp__DOT__temp_PC 
-	= (((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xdU] 
-	     >> 2U) & (5U == (0xfU & vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])))
-	    ? ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xdU] 
-		<< 0x1eU) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xcU] 
-			     >> 2U)) : (((IData)(vlTOPp->Vortex__DOT__vx_memory__DOT__temp_branch_dir) 
+	= (((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xdU] 
+	     >> 2U) & (5U == (0xfU & vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])))
+	    ? ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xdU] 
+		<< 0x1eU) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xcU] 
+			     >> 2U)) : (((IData)(vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_memory__DOT__temp_branch_dir) 
 					 & (5U == (0xfU 
-						   & vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])))
+						   & vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])))
 					 ? vlSymsp->TOP__Vortex__DOT__VX_branch_rsp.branch_dest
 					 : vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_fetch__DOT__genblk2__BRA__5__KET____DOT__VX_Warp__DOT__real_PC));
     // ALWAYS at VX_warp.v:57
     vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_fetch__DOT__genblk2__BRA__6__KET____DOT__VX_Warp__DOT__temp_PC 
-	= (((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xdU] 
-	     >> 2U) & (6U == (0xfU & vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])))
-	    ? ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xdU] 
-		<< 0x1eU) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xcU] 
-			     >> 2U)) : (((IData)(vlTOPp->Vortex__DOT__vx_memory__DOT__temp_branch_dir) 
+	= (((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xdU] 
+	     >> 2U) & (6U == (0xfU & vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])))
+	    ? ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xdU] 
+		<< 0x1eU) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xcU] 
+			     >> 2U)) : (((IData)(vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_memory__DOT__temp_branch_dir) 
 					 & (6U == (0xfU 
-						   & vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])))
+						   & vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])))
 					 ? vlSymsp->TOP__Vortex__DOT__VX_branch_rsp.branch_dest
 					 : vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_fetch__DOT__genblk2__BRA__6__KET____DOT__VX_Warp__DOT__real_PC));
     // ALWAYS at VX_warp.v:57
     vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_fetch__DOT__genblk2__BRA__7__KET____DOT__VX_Warp__DOT__temp_PC 
-	= (((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xdU] 
-	     >> 2U) & (7U == (0xfU & vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])))
-	    ? ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xdU] 
-		<< 0x1eU) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xcU] 
-			     >> 2U)) : (((IData)(vlTOPp->Vortex__DOT__vx_memory__DOT__temp_branch_dir) 
+	= (((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xdU] 
+	     >> 2U) & (7U == (0xfU & vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])))
+	    ? ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xdU] 
+		<< 0x1eU) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xcU] 
+			     >> 2U)) : (((IData)(vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_memory__DOT__temp_branch_dir) 
 					 & (7U == (0xfU 
-						   & vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])))
+						   & vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0U])))
 					 ? vlSymsp->TOP__Vortex__DOT__VX_branch_rsp.branch_dest
 					 : vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_fetch__DOT__genblk2__BRA__7__KET____DOT__VX_Warp__DOT__real_PC));
     vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_wb_fwd 
 	= (((((((0x1fU & ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] 
 			   << 9U) | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] 
 				     >> 0x17U))) == 
-		(0x1fU & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
-			   << 0x16U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+		(0x1fU & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			   << 0x16U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					>> 0xaU)))) 
 	       & (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] 
 				   << 9U) | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] 
 					     >> 0x17U))))) 
-	      & (0U != (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
-			       << 0x18U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+	      & (0U != (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			       << 0x18U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					    >> 8U))))) 
-	     & ((0xfU & vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U]) 
+	     & ((0xfU & vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U]) 
 		== (0xfU & ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] 
 			     << 0x1cU) | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] 
 					  >> 4U))))) 
@@ -10332,32 +10333,32 @@ VL_INLINE_OPT void VVortex::_sequent__TOP__7(VVortex__Syms* __restrict vlSymsp)
     vlTOPp->Vortex__DOT__forwarding_fwd_stall = ((((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_exe_fwd) 
 						   | (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_exe_fwd)) 
 						  & (2U 
-						     == (IData)(vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.wb))) 
+						     == (IData)(vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_exe_mem_req.wb))) 
 						 | (((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_mem_fwd) 
 						     | (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_mem_fwd)) 
 						    & (2U 
 						       == 
 						       (3U 
-							& ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
+							& ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
 							    << 0xbU) 
-							   | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] 
+							   | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] 
 							      >> 0x15U))))));
     vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_wb_fwd 
 	= (((((((0x1fU & ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] 
 			   << 4U) | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] 
 				     >> 0x1cU))) == 
-		(0x1fU & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
-			   << 0x16U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+		(0x1fU & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			   << 0x16U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					>> 0xaU)))) 
 	       & (0U != (0x1fU & ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] 
 				   << 4U) | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] 
 					     >> 0x1cU))))) 
-	      & (0U != (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
-			       << 0x18U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+	      & (0U != (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			       << 0x18U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					    >> 8U))))) 
 	     & (~ (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_exe_fwd))) 
 	    & (~ (IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_mem_fwd))) 
-	   & ((0xfU & vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U]) 
+	   & ((0xfU & vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[0U]) 
 	      == (0xfU & ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[1U] 
 			   << 0x1cU) | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[0U] 
 					>> 4U)))));
@@ -10527,17 +10528,17 @@ VL_INLINE_OPT void VVortex::_combo__TOP__9(VVortex__Syms* __restrict vlSymsp) {
     VL_DEBUG_IF(VL_DBG_MSGF("+    VVortex::_combo__TOP__9\n"); );
     VVortex* __restrict vlTOPp VL_ATTR_UNUSED = vlSymsp->TOPp;
     // Body
-    vlSymsp->TOP__Vortex__DOT__VX_mem_wb.mem_result[0U] 
-	= vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_cache_driver_out_data
+    vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_mem_wb.mem_result[0U] 
+	= vlSymsp->TOP__Vortex__DOT__VX_dcache_rsp.in_cache_driver_out_data
 	[0U];
-    vlSymsp->TOP__Vortex__DOT__VX_mem_wb.mem_result[1U] 
-	= vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_cache_driver_out_data
+    vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_mem_wb.mem_result[1U] 
+	= vlSymsp->TOP__Vortex__DOT__VX_dcache_rsp.in_cache_driver_out_data
 	[1U];
-    vlSymsp->TOP__Vortex__DOT__VX_mem_wb.mem_result[2U] 
-	= vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_cache_driver_out_data
+    vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_mem_wb.mem_result[2U] 
+	= vlSymsp->TOP__Vortex__DOT__VX_dcache_rsp.in_cache_driver_out_data
 	[2U];
-    vlSymsp->TOP__Vortex__DOT__VX_mem_wb.mem_result[3U] 
-	= vlTOPp->Vortex__DOT____Vcellinp__vx_memory__in_cache_driver_out_data
+    vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_mem_wb.mem_result[3U] 
+	= vlSymsp->TOP__Vortex__DOT__VX_dcache_rsp.in_cache_driver_out_data
 	[3U];
 }
 
@@ -10550,13 +10551,13 @@ VL_INLINE_OPT void VVortex::_multiclk__TOP__10(VVortex__Syms* __restrict vlSymsp
     VL_SIGW(__Vtemp127,479,0,15);
     // Body
     // ALWAYS at VX_alu.v:48
-    vlTOPp->Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__0__KET____DOT__vx_alu__out_alu_result 
+    vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__0__KET____DOT__vx_alu__out_alu_result 
 	= ((0x2000U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
 	    ? ((0x1000U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
 	        ? 0U : ((0x800U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
 			 ? ((0x400U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
 			     ? ((0x200U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
-				 ? ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2)
+				 ? ((0U == vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2)
 				     ? ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] 
 					 << 0x12U) 
 					| (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[9U] 
@@ -10565,8 +10566,8 @@ VL_INLINE_OPT void VVortex::_multiclk__TOP__10(VVortex__Syms* __restrict vlSymsp
 						     ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] 
 						       << 0x12U) 
 						      | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[9U] 
-							 >> 0xeU)), vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2))
-				 : ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2)
+							 >> 0xeU)), vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2))
+				 : ((0U == vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2)
 				     ? ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] 
 					 << 0x12U) 
 					| (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[9U] 
@@ -10575,22 +10576,22 @@ VL_INLINE_OPT void VVortex::_multiclk__TOP__10(VVortex__Syms* __restrict vlSymsp
 						      ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] 
 							<< 0x12U) 
 						       | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[9U] 
-							  >> 0xeU)), vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2)))
+							  >> 0xeU)), vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2)))
 			     : ((0x200U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
-				 ? ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2)
+				 ? ((0U == vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2)
 				     ? 0xffffffffU : 
 				    VL_DIV_III(32, 
 					       ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] 
 						 << 0x12U) 
 						| (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[9U] 
-						   >> 0xeU)), vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2))
-				 : ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2)
+						   >> 0xeU)), vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2))
+				 : ((0U == vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2)
 				     ? 0xffffffffU : 
 				    VL_DIVS_III(32, 
 						((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] 
 						  << 0x12U) 
 						 | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[9U] 
-						    >> 0xeU)), vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2))))
+						    >> 0xeU)), vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2))))
 			 : ((0x400U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
 			     ? ((0x200U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
 				 ? (IData)((((QData)((IData)(
@@ -10598,7 +10599,7 @@ VL_INLINE_OPT void VVortex::_multiclk__TOP__10(VVortex__Syms* __restrict vlSymsp
 							       << 0x12U) 
 							      | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[9U] 
 								 >> 0xeU)))) 
-					     * (QData)((IData)(vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2))) 
+					     * (QData)((IData)(vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2))) 
 					    >> 0x20U))
 				 : (IData)((((((QData)((IData)(
 							       VL_NEGATE_I((IData)(
@@ -10611,12 +10612,12 @@ VL_INLINE_OPT void VVortex::_multiclk__TOP__10(VVortex__Syms* __restrict vlSymsp
 								  << 0x12U) 
 								 | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[9U] 
 								    >> 0xeU))))) 
-					     * (QData)((IData)(vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2))) 
+					     * (QData)((IData)(vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2))) 
 					    >> 0x20U)))
 			     : ((0x200U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
-				 ? (IData)((vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__mult_signed_result 
+				 ? (IData)((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__mult_signed_result 
 					    >> 0x20U))
-				 : (IData)(vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__mult_signed_result)))))
+				 : (IData)(vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__mult_signed_result)))))
 	    : ((0x1000U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
 	        ? ((0x800U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
 		    ? ((0x400U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
@@ -10635,17 +10636,17 @@ VL_INLINE_OPT void VVortex::_multiclk__TOP__10(VVortex__Syms* __restrict vlSymsp
 			    : ((((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] 
 				  << 0x12U) | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[9U] 
 					       >> 0xeU)) 
-				>= vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2)
+				>= vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2)
 			        ? 0U : 0xffffffffU))
 		        : ((0x200U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
-			    ? (vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2 
+			    ? (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2 
 			       & ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] 
 				   << 0x12U) | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[9U] 
 						>> 0xeU)))
 			    : (((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] 
 				 << 0x12U) | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[9U] 
 					      >> 0xeU)) 
-			       | vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2))))
+			       | vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2))))
 	        : ((0x800U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
 		    ? ((0x400U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
 		        ? ((0x200U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
@@ -10655,20 +10656,20 @@ VL_INLINE_OPT void VVortex::_multiclk__TOP__10(VVortex__Syms* __restrict vlSymsp
 					      | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[9U] 
 						 >> 0xeU)), 
 					     (0x1fU 
-					      & vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2))
+					      & vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2))
 			    : (((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] 
 				 << 0x12U) | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[9U] 
 					      >> 0xeU)) 
-			       >> (0x1fU & vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2)))
+			       >> (0x1fU & vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2)))
 		        : ((0x200U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
 			    ? (((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] 
 				 << 0x12U) | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[9U] 
 					      >> 0xeU)) 
-			       ^ vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2)
+			       ^ vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2)
 			    : ((((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] 
 				  << 0x12U) | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[9U] 
 					       >> 0xeU)) 
-				< vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2)
+				< vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2)
 			        ? 1U : 0U))) : ((0x400U 
 						 & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
 						 ? 
@@ -10679,7 +10680,7 @@ VL_INLINE_OPT void VVortex::_multiclk__TOP__10(VVortex__Syms* __restrict vlSymsp
 							     ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] 
 							       << 0x12U) 
 							      | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[9U] 
-								 >> 0xeU)), vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2)
+								 >> 0xeU)), vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2)
 						   ? 1U
 						   : 0U)
 						  : 
@@ -10689,7 +10690,7 @@ VL_INLINE_OPT void VVortex::_multiclk__TOP__10(VVortex__Syms* __restrict vlSymsp
 						      >> 0xeU)) 
 						  << 
 						  (0x1fU 
-						   & vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2)))
+						   & vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2)))
 						 : 
 						((0x200U 
 						  & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
@@ -10698,21 +10699,21 @@ VL_INLINE_OPT void VVortex::_multiclk__TOP__10(VVortex__Syms* __restrict vlSymsp
 						    << 0x12U) 
 						   | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[9U] 
 						      >> 0xeU)) 
-						  - vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2)
+						  - vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2)
 						  : 
 						 (((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] 
 						    << 0x12U) 
 						   | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[9U] 
 						      >> 0xeU)) 
-						  + vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2))))));
+						  + vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2))))));
     // ALWAYS at VX_alu.v:48
-    vlTOPp->Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__1__KET____DOT__vx_alu__out_alu_result 
+    vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__1__KET____DOT__vx_alu__out_alu_result 
 	= ((0x2000U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
 	    ? ((0x1000U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
 	        ? 0U : ((0x800U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
 			 ? ((0x400U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
 			     ? ((0x200U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
-				 ? ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2)
+				 ? ((0U == vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2)
 				     ? ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] 
 					 << 0x12U) 
 					| (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] 
@@ -10721,8 +10722,8 @@ VL_INLINE_OPT void VVortex::_multiclk__TOP__10(VVortex__Syms* __restrict vlSymsp
 						     ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] 
 						       << 0x12U) 
 						      | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] 
-							 >> 0xeU)), vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2))
-				 : ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2)
+							 >> 0xeU)), vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2))
+				 : ((0U == vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2)
 				     ? ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] 
 					 << 0x12U) 
 					| (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] 
@@ -10731,22 +10732,22 @@ VL_INLINE_OPT void VVortex::_multiclk__TOP__10(VVortex__Syms* __restrict vlSymsp
 						      ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] 
 							<< 0x12U) 
 						       | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] 
-							  >> 0xeU)), vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2)))
+							  >> 0xeU)), vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2)))
 			     : ((0x200U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
-				 ? ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2)
+				 ? ((0U == vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2)
 				     ? 0xffffffffU : 
 				    VL_DIV_III(32, 
 					       ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] 
 						 << 0x12U) 
 						| (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] 
-						   >> 0xeU)), vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2))
-				 : ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2)
+						   >> 0xeU)), vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2))
+				 : ((0U == vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2)
 				     ? 0xffffffffU : 
 				    VL_DIVS_III(32, 
 						((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] 
 						  << 0x12U) 
 						 | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] 
-						    >> 0xeU)), vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2))))
+						    >> 0xeU)), vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2))))
 			 : ((0x400U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
 			     ? ((0x200U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
 				 ? (IData)((((QData)((IData)(
@@ -10754,7 +10755,7 @@ VL_INLINE_OPT void VVortex::_multiclk__TOP__10(VVortex__Syms* __restrict vlSymsp
 							       << 0x12U) 
 							      | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] 
 								 >> 0xeU)))) 
-					     * (QData)((IData)(vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2))) 
+					     * (QData)((IData)(vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2))) 
 					    >> 0x20U))
 				 : (IData)((((((QData)((IData)(
 							       VL_NEGATE_I((IData)(
@@ -10767,12 +10768,12 @@ VL_INLINE_OPT void VVortex::_multiclk__TOP__10(VVortex__Syms* __restrict vlSymsp
 								  << 0x12U) 
 								 | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] 
 								    >> 0xeU))))) 
-					     * (QData)((IData)(vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2))) 
+					     * (QData)((IData)(vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2))) 
 					    >> 0x20U)))
 			     : ((0x200U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
-				 ? (IData)((vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__mult_signed_result 
+				 ? (IData)((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__mult_signed_result 
 					    >> 0x20U))
-				 : (IData)(vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__mult_signed_result)))))
+				 : (IData)(vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__mult_signed_result)))))
 	    : ((0x1000U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
 	        ? ((0x800U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
 		    ? ((0x400U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
@@ -10791,17 +10792,17 @@ VL_INLINE_OPT void VVortex::_multiclk__TOP__10(VVortex__Syms* __restrict vlSymsp
 			    : ((((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] 
 				  << 0x12U) | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] 
 					       >> 0xeU)) 
-				>= vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2)
+				>= vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2)
 			        ? 0U : 0xffffffffU))
 		        : ((0x200U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
-			    ? (vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2 
+			    ? (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2 
 			       & ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] 
 				   << 0x12U) | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] 
 						>> 0xeU)))
 			    : (((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] 
 				 << 0x12U) | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] 
 					      >> 0xeU)) 
-			       | vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2))))
+			       | vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2))))
 	        : ((0x800U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
 		    ? ((0x400U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
 		        ? ((0x200U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
@@ -10811,20 +10812,20 @@ VL_INLINE_OPT void VVortex::_multiclk__TOP__10(VVortex__Syms* __restrict vlSymsp
 					      | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] 
 						 >> 0xeU)), 
 					     (0x1fU 
-					      & vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2))
+					      & vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2))
 			    : (((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] 
 				 << 0x12U) | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] 
 					      >> 0xeU)) 
-			       >> (0x1fU & vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2)))
+			       >> (0x1fU & vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2)))
 		        : ((0x200U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
 			    ? (((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] 
 				 << 0x12U) | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] 
 					      >> 0xeU)) 
-			       ^ vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2)
+			       ^ vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2)
 			    : ((((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] 
 				  << 0x12U) | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] 
 					       >> 0xeU)) 
-				< vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2)
+				< vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2)
 			        ? 1U : 0U))) : ((0x400U 
 						 & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
 						 ? 
@@ -10835,7 +10836,7 @@ VL_INLINE_OPT void VVortex::_multiclk__TOP__10(VVortex__Syms* __restrict vlSymsp
 							     ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] 
 							       << 0x12U) 
 							      | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] 
-								 >> 0xeU)), vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2)
+								 >> 0xeU)), vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2)
 						   ? 1U
 						   : 0U)
 						  : 
@@ -10845,7 +10846,7 @@ VL_INLINE_OPT void VVortex::_multiclk__TOP__10(VVortex__Syms* __restrict vlSymsp
 						      >> 0xeU)) 
 						  << 
 						  (0x1fU 
-						   & vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2)))
+						   & vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2)))
 						 : 
 						((0x200U 
 						  & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
@@ -10854,21 +10855,21 @@ VL_INLINE_OPT void VVortex::_multiclk__TOP__10(VVortex__Syms* __restrict vlSymsp
 						    << 0x12U) 
 						   | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] 
 						      >> 0xeU)) 
-						  - vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2)
+						  - vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2)
 						  : 
 						 (((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] 
 						    << 0x12U) 
 						   | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] 
 						      >> 0xeU)) 
-						  + vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2))))));
+						  + vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2))))));
     // ALWAYS at VX_alu.v:48
-    vlTOPp->Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__2__KET____DOT__vx_alu__out_alu_result 
+    vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__2__KET____DOT__vx_alu__out_alu_result 
 	= ((0x2000U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
 	    ? ((0x1000U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
 	        ? 0U : ((0x800U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
 			 ? ((0x400U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
 			     ? ((0x200U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
-				 ? ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2)
+				 ? ((0U == vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2)
 				     ? ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] 
 					 << 0x12U) 
 					| (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] 
@@ -10877,8 +10878,8 @@ VL_INLINE_OPT void VVortex::_multiclk__TOP__10(VVortex__Syms* __restrict vlSymsp
 						     ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] 
 						       << 0x12U) 
 						      | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] 
-							 >> 0xeU)), vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2))
-				 : ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2)
+							 >> 0xeU)), vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2))
+				 : ((0U == vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2)
 				     ? ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] 
 					 << 0x12U) 
 					| (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] 
@@ -10887,22 +10888,22 @@ VL_INLINE_OPT void VVortex::_multiclk__TOP__10(VVortex__Syms* __restrict vlSymsp
 						      ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] 
 							<< 0x12U) 
 						       | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] 
-							  >> 0xeU)), vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2)))
+							  >> 0xeU)), vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2)))
 			     : ((0x200U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
-				 ? ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2)
+				 ? ((0U == vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2)
 				     ? 0xffffffffU : 
 				    VL_DIV_III(32, 
 					       ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] 
 						 << 0x12U) 
 						| (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] 
-						   >> 0xeU)), vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2))
-				 : ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2)
+						   >> 0xeU)), vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2))
+				 : ((0U == vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2)
 				     ? 0xffffffffU : 
 				    VL_DIVS_III(32, 
 						((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] 
 						  << 0x12U) 
 						 | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] 
-						    >> 0xeU)), vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2))))
+						    >> 0xeU)), vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2))))
 			 : ((0x400U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
 			     ? ((0x200U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
 				 ? (IData)((((QData)((IData)(
@@ -10910,7 +10911,7 @@ VL_INLINE_OPT void VVortex::_multiclk__TOP__10(VVortex__Syms* __restrict vlSymsp
 							       << 0x12U) 
 							      | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] 
 								 >> 0xeU)))) 
-					     * (QData)((IData)(vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2))) 
+					     * (QData)((IData)(vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2))) 
 					    >> 0x20U))
 				 : (IData)((((((QData)((IData)(
 							       VL_NEGATE_I((IData)(
@@ -10923,12 +10924,12 @@ VL_INLINE_OPT void VVortex::_multiclk__TOP__10(VVortex__Syms* __restrict vlSymsp
 								  << 0x12U) 
 								 | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] 
 								    >> 0xeU))))) 
-					     * (QData)((IData)(vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2))) 
+					     * (QData)((IData)(vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2))) 
 					    >> 0x20U)))
 			     : ((0x200U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
-				 ? (IData)((vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__mult_signed_result 
+				 ? (IData)((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__mult_signed_result 
 					    >> 0x20U))
-				 : (IData)(vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__mult_signed_result)))))
+				 : (IData)(vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__mult_signed_result)))))
 	    : ((0x1000U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
 	        ? ((0x800U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
 		    ? ((0x400U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
@@ -10947,17 +10948,17 @@ VL_INLINE_OPT void VVortex::_multiclk__TOP__10(VVortex__Syms* __restrict vlSymsp
 			    : ((((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] 
 				  << 0x12U) | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] 
 					       >> 0xeU)) 
-				>= vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2)
+				>= vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2)
 			        ? 0U : 0xffffffffU))
 		        : ((0x200U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
-			    ? (vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2 
+			    ? (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2 
 			       & ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] 
 				   << 0x12U) | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] 
 						>> 0xeU)))
 			    : (((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] 
 				 << 0x12U) | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] 
 					      >> 0xeU)) 
-			       | vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2))))
+			       | vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2))))
 	        : ((0x800U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
 		    ? ((0x400U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
 		        ? ((0x200U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
@@ -10967,20 +10968,20 @@ VL_INLINE_OPT void VVortex::_multiclk__TOP__10(VVortex__Syms* __restrict vlSymsp
 					      | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] 
 						 >> 0xeU)), 
 					     (0x1fU 
-					      & vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2))
+					      & vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2))
 			    : (((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] 
 				 << 0x12U) | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] 
 					      >> 0xeU)) 
-			       >> (0x1fU & vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2)))
+			       >> (0x1fU & vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2)))
 		        : ((0x200U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
 			    ? (((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] 
 				 << 0x12U) | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] 
 					      >> 0xeU)) 
-			       ^ vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2)
+			       ^ vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2)
 			    : ((((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] 
 				  << 0x12U) | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] 
 					       >> 0xeU)) 
-				< vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2)
+				< vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2)
 			        ? 1U : 0U))) : ((0x400U 
 						 & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
 						 ? 
@@ -10991,7 +10992,7 @@ VL_INLINE_OPT void VVortex::_multiclk__TOP__10(VVortex__Syms* __restrict vlSymsp
 							     ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] 
 							       << 0x12U) 
 							      | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] 
-								 >> 0xeU)), vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2)
+								 >> 0xeU)), vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2)
 						   ? 1U
 						   : 0U)
 						  : 
@@ -11001,7 +11002,7 @@ VL_INLINE_OPT void VVortex::_multiclk__TOP__10(VVortex__Syms* __restrict vlSymsp
 						      >> 0xeU)) 
 						  << 
 						  (0x1fU 
-						   & vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2)))
+						   & vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2)))
 						 : 
 						((0x200U 
 						  & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
@@ -11010,21 +11011,21 @@ VL_INLINE_OPT void VVortex::_multiclk__TOP__10(VVortex__Syms* __restrict vlSymsp
 						    << 0x12U) 
 						   | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] 
 						      >> 0xeU)) 
-						  - vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2)
+						  - vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2)
 						  : 
 						 (((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] 
 						    << 0x12U) 
 						   | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xbU] 
 						      >> 0xeU)) 
-						  + vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2))))));
+						  + vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2))))));
     // ALWAYS at VX_alu.v:48
-    vlTOPp->Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__3__KET____DOT__vx_alu__out_alu_result 
+    vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__3__KET____DOT__vx_alu__out_alu_result 
 	= ((0x2000U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
 	    ? ((0x1000U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
 	        ? 0U : ((0x800U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
 			 ? ((0x400U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
 			     ? ((0x200U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
-				 ? ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2)
+				 ? ((0U == vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2)
 				     ? ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xdU] 
 					 << 0x12U) 
 					| (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] 
@@ -11033,8 +11034,8 @@ VL_INLINE_OPT void VVortex::_multiclk__TOP__10(VVortex__Syms* __restrict vlSymsp
 						     ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xdU] 
 						       << 0x12U) 
 						      | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] 
-							 >> 0xeU)), vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2))
-				 : ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2)
+							 >> 0xeU)), vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2))
+				 : ((0U == vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2)
 				     ? ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xdU] 
 					 << 0x12U) 
 					| (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] 
@@ -11043,22 +11044,22 @@ VL_INLINE_OPT void VVortex::_multiclk__TOP__10(VVortex__Syms* __restrict vlSymsp
 						      ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xdU] 
 							<< 0x12U) 
 						       | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] 
-							  >> 0xeU)), vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2)))
+							  >> 0xeU)), vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2)))
 			     : ((0x200U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
-				 ? ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2)
+				 ? ((0U == vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2)
 				     ? 0xffffffffU : 
 				    VL_DIV_III(32, 
 					       ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xdU] 
 						 << 0x12U) 
 						| (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] 
-						   >> 0xeU)), vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2))
-				 : ((0U == vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2)
+						   >> 0xeU)), vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2))
+				 : ((0U == vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2)
 				     ? 0xffffffffU : 
 				    VL_DIVS_III(32, 
 						((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xdU] 
 						  << 0x12U) 
 						 | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] 
-						    >> 0xeU)), vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2))))
+						    >> 0xeU)), vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2))))
 			 : ((0x400U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
 			     ? ((0x200U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
 				 ? (IData)((((QData)((IData)(
@@ -11066,7 +11067,7 @@ VL_INLINE_OPT void VVortex::_multiclk__TOP__10(VVortex__Syms* __restrict vlSymsp
 							       << 0x12U) 
 							      | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] 
 								 >> 0xeU)))) 
-					     * (QData)((IData)(vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2))) 
+					     * (QData)((IData)(vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2))) 
 					    >> 0x20U))
 				 : (IData)((((((QData)((IData)(
 							       VL_NEGATE_I((IData)(
@@ -11079,12 +11080,12 @@ VL_INLINE_OPT void VVortex::_multiclk__TOP__10(VVortex__Syms* __restrict vlSymsp
 								  << 0x12U) 
 								 | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] 
 								    >> 0xeU))))) 
-					     * (QData)((IData)(vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2))) 
+					     * (QData)((IData)(vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2))) 
 					    >> 0x20U)))
 			     : ((0x200U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
-				 ? (IData)((vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__mult_signed_result 
+				 ? (IData)((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__mult_signed_result 
 					    >> 0x20U))
-				 : (IData)(vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__mult_signed_result)))))
+				 : (IData)(vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__mult_signed_result)))))
 	    : ((0x1000U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
 	        ? ((0x800U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
 		    ? ((0x400U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
@@ -11103,17 +11104,17 @@ VL_INLINE_OPT void VVortex::_multiclk__TOP__10(VVortex__Syms* __restrict vlSymsp
 			    : ((((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xdU] 
 				  << 0x12U) | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] 
 					       >> 0xeU)) 
-				>= vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2)
+				>= vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2)
 			        ? 0U : 0xffffffffU))
 		        : ((0x200U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
-			    ? (vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2 
+			    ? (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2 
 			       & ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xdU] 
 				   << 0x12U) | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] 
 						>> 0xeU)))
 			    : (((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xdU] 
 				 << 0x12U) | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] 
 					      >> 0xeU)) 
-			       | vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2))))
+			       | vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2))))
 	        : ((0x800U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
 		    ? ((0x400U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
 		        ? ((0x200U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
@@ -11123,20 +11124,20 @@ VL_INLINE_OPT void VVortex::_multiclk__TOP__10(VVortex__Syms* __restrict vlSymsp
 					      | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] 
 						 >> 0xeU)), 
 					     (0x1fU 
-					      & vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2))
+					      & vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2))
 			    : (((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xdU] 
 				 << 0x12U) | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] 
 					      >> 0xeU)) 
-			       >> (0x1fU & vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2)))
+			       >> (0x1fU & vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2)))
 		        : ((0x200U & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
 			    ? (((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xdU] 
 				 << 0x12U) | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] 
 					      >> 0xeU)) 
-			       ^ vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2)
+			       ^ vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2)
 			    : ((((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xdU] 
 				  << 0x12U) | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] 
 					       >> 0xeU)) 
-				< vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2)
+				< vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2)
 			        ? 1U : 0U))) : ((0x400U 
 						 & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
 						 ? 
@@ -11147,7 +11148,7 @@ VL_INLINE_OPT void VVortex::_multiclk__TOP__10(VVortex__Syms* __restrict vlSymsp
 							     ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xdU] 
 							       << 0x12U) 
 							      | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] 
-								 >> 0xeU)), vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2)
+								 >> 0xeU)), vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2)
 						   ? 1U
 						   : 0U)
 						  : 
@@ -11157,7 +11158,7 @@ VL_INLINE_OPT void VVortex::_multiclk__TOP__10(VVortex__Syms* __restrict vlSymsp
 						      >> 0xeU)) 
 						  << 
 						  (0x1fU 
-						   & vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2)))
+						   & vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2)))
 						 : 
 						((0x200U 
 						  & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U])
@@ -11166,21 +11167,21 @@ VL_INLINE_OPT void VVortex::_multiclk__TOP__10(VVortex__Syms* __restrict vlSymsp
 						    << 0x12U) 
 						   | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] 
 						      >> 0xeU)) 
-						  - vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2)
+						  - vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2)
 						  : 
 						 (((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xdU] 
 						    << 0x12U) 
 						   | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xcU] 
 						      >> 0xeU)) 
-						  + vlTOPp->Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2))))));
-    vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[0U] 
-	= vlTOPp->Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__0__KET____DOT__vx_alu__out_alu_result;
-    vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[1U] 
-	= vlTOPp->Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__1__KET____DOT__vx_alu__out_alu_result;
-    vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[2U] 
-	= vlTOPp->Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__2__KET____DOT__vx_alu__out_alu_result;
-    vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[3U] 
-	= vlTOPp->Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__3__KET____DOT__vx_alu__out_alu_result;
+						  + vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2))))));
+    vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_exe_mem_req.alu_result[0U] 
+	= vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__0__KET____DOT__vx_alu__out_alu_result;
+    vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_exe_mem_req.alu_result[1U] 
+	= vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__1__KET____DOT__vx_alu__out_alu_result;
+    vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_exe_mem_req.alu_result[2U] 
+	= vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__2__KET____DOT__vx_alu__out_alu_result;
+    vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_exe_mem_req.alu_result[3U] 
+	= vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__3__KET____DOT__vx_alu__out_alu_result;
     __Vtemp118[5U] = ((0xfff80000U & (((0xdU == (0x1fU 
 						 & ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[6U] 
 						     << 0x17U) 
@@ -11274,7 +11275,7 @@ VL_INLINE_OPT void VVortex::_multiclk__TOP__10(VVortex__Syms* __restrict vlSymsp
 						| (0x7f800000U 
 						   & (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xdU] 
 						      >> 1U)))) 
-					    | (((IData)(vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.wb) 
+					    | (((IData)(vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_exe_mem_req.wb) 
 						<< 0x15U) 
 					       | (0x1f0000U 
 						  & ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xeU] 
@@ -11288,15 +11289,15 @@ VL_INLINE_OPT void VVortex::_multiclk__TOP__10(VVortex__Syms* __restrict vlSymsp
 						      >> 3U)))) 
 			 | (0x7ffU & (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[9U] 
 				      >> 3U))));
-    __Vtemp127[8U] = ((0xffffU & ((0xfffcU & (vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[0U] 
+    __Vtemp127[8U] = ((0xffffU & ((0xfffcU & (vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_exe_mem_req.alu_result[0U] 
 					      << 2U)) 
 				  | ((3U & (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[4U] 
 					    >> 4U)) 
-				     | (0xffffU & ((IData)(vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.wb) 
+				     | (0xffffU & ((IData)(vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_exe_mem_req.wb) 
 						   >> 0xbU))))) 
-		      | (0xffff0000U & (vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[0U] 
+		      | (0xffff0000U & (vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_exe_mem_req.alu_result[0U] 
 					<< 2U)));
-    vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[0U] 
+    vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[0U] 
 	= ((0xfffff800U & (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[4U] 
 			   << 5U)) | ((0x700U & ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[4U] 
 						  << 0xbU) 
@@ -11304,19 +11305,19 @@ VL_INLINE_OPT void VVortex::_multiclk__TOP__10(VVortex__Syms* __restrict vlSymsp
 						    & (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[3U] 
 						       >> 0x15U)))) 
 				      | (0xffU & vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0U])));
-    vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[1U] 
+    vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[1U] 
 	= ((0x7ffU & ((0x7e0U & (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U] 
 				 << 5U)) | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[4U] 
 					    >> 0x1bU))) 
 	   | (0xfffff800U & (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[2U] 
 			     << 2U)));
-    vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[2U] 
+    vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[2U] 
 	= ((0x7ffU & ((0x7fcU & (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[3U] 
 				 << 2U)) | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[2U] 
 					    >> 0x1eU))) 
 	   | (0xfffff800U & (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0U] 
 			     << 3U)));
-    vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[3U] 
+    vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[3U] 
 	= ((0x7ffU & ((0x7f8U & (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[1U] 
 				 << 3U)) | (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0U] 
 					    >> 0x1dU))) 
@@ -11324,54 +11325,54 @@ VL_INLINE_OPT void VVortex::_multiclk__TOP__10(VVortex__Syms* __restrict vlSymsp
 			      << 0x1dU) | (0x1ffff800U 
 					   & (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[5U] 
 					      >> 3U)))));
-    vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[4U] 
+    vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[4U] 
 	= ((0x7ffU & (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[6U] 
 		      >> 3U)) | (0xfffff800U & ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[7U] 
 						 << 0x1dU) 
 						| (0x1ffff800U 
 						   & (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[6U] 
 						      >> 3U)))));
-    vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[5U] 
+    vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[5U] 
 	= ((0x7ffU & (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[7U] 
 		      >> 3U)) | (0xfffff800U & ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[8U] 
 						 << 0x1dU) 
 						| (0x1ffff800U 
 						   & (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[7U] 
 						      >> 3U)))));
-    vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[6U] 
+    vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[6U] 
 	= ((0x7ffU & (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[8U] 
 		      >> 3U)) | (0xfffff800U & ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[9U] 
 						 << 0x1dU) 
 						| (0x1ffff800U 
 						   & (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[8U] 
 						      >> 3U)))));
-    vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[7U] 
+    vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[7U] 
 	= __Vtemp127[7U];
-    vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[8U] 
+    vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[8U] 
 	= __Vtemp127[8U];
-    vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[9U] 
-	= ((0xffffU & ((3U & (vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[0U] 
+    vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[9U] 
+	= ((0xffffU & ((3U & (vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_exe_mem_req.alu_result[0U] 
 			      >> 0x1eU)) | (0xfffcU 
-					    & (vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[1U] 
+					    & (vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_exe_mem_req.alu_result[1U] 
 					       << 2U)))) 
-	   | (0xffff0000U & (vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[1U] 
+	   | (0xffff0000U & (vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_exe_mem_req.alu_result[1U] 
 			     << 2U)));
-    vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[0xaU] 
-	= ((0xffffU & ((3U & (vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[1U] 
+    vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[0xaU] 
+	= ((0xffffU & ((3U & (vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_exe_mem_req.alu_result[1U] 
 			      >> 0x1eU)) | (0xfffcU 
-					    & (vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[2U] 
+					    & (vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_exe_mem_req.alu_result[2U] 
 					       << 2U)))) 
-	   | (0xffff0000U & (vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[2U] 
+	   | (0xffff0000U & (vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_exe_mem_req.alu_result[2U] 
 			     << 2U)));
-    vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[0xbU] 
-	= ((0xffffU & ((3U & (vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[2U] 
+    vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[0xbU] 
+	= ((0xffffU & ((3U & (vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_exe_mem_req.alu_result[2U] 
 			      >> 0x1eU)) | (0xfffcU 
-					    & (vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[3U] 
+					    & (vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_exe_mem_req.alu_result[3U] 
 					       << 2U)))) 
-	   | (0xffff0000U & (vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[3U] 
+	   | (0xffff0000U & (vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_exe_mem_req.alu_result[3U] 
 			     << 2U)));
-    vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[0xcU] 
-	= ((0xffffU & ((3U & (vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[3U] 
+    vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[0xcU] 
+	= ((0xffffU & ((3U & (vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_exe_mem_req.alu_result[3U] 
 			      >> 0x1eU)) | (0xfffcU 
 					    & ((((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xaU] 
 						  << 0x12U) 
@@ -11384,10 +11385,10 @@ VL_INLINE_OPT void VVortex::_multiclk__TOP__10(VVortex__Syms* __restrict vlSymsp
 						      >> 8U))) 
 					       << 2U)))) 
 	   | (0xffff0000U & (__Vtemp118[5U] << 0x10U)));
-    vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[0xdU] 
+    vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[0xdU] 
 	= ((0xffffU & (__Vtemp118[5U] >> 0x10U)) | 
 	   (0xffff0000U & (__Vtemp118[6U] << 0x10U)));
-    vlTOPp->Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[0xeU] 
+    vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in[0xeU] 
 	= (0xffffU & ((0xfff0U & ((0xffc0U & (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xfU] 
 					      << 6U)) 
 				  | (0x30U & (vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value[0xeU] 
@@ -11407,308 +11408,308 @@ VL_INLINE_OPT void VVortex::_combo__TOP__11(VVortex__Syms* __restrict vlSymsp) {
     VL_SIGW(__Vtemp177,319,0,10);
     // Body
     __Vtemp142[0U] = ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_mem_fwd)
-		       ? ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
+		       ? ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
 					 << 0xbU) | 
-					(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] 
+					(vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] 
 					 >> 0x15U))))
 			   ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next[0U]
-			   : ((2U == (3U & ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
+			   : ((2U == (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
 					     << 0xbU) 
-					    | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] 
+					    | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] 
 					       >> 0x15U))))
-			       ? vlSymsp->TOP__Vortex__DOT__VX_mem_wb.mem_result[0U]
-			       : ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[9U] 
-				   << 0x1eU) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
+			       ? vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_mem_wb.mem_result[0U]
+			       : ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[9U] 
+				   << 0x1eU) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
 						>> 2U))))
 		       : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_wb_fwd)
-			   ? ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			   ? ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
 					     << 0x18U) 
-					    | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+					    | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					       >> 8U))))
 			       ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next[0U]
-			       : ((2U == (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			       : ((2U == (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
 						 << 0x18U) 
-						| (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+						| (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 						   >> 8U))))
-				   ? ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+				   ? ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
 				       << 0x11U) | 
-				      (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+				      (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 				       >> 0xfU)) : 
-				  ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[6U] 
-				    << 0x11U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[5U] 
+				  ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[6U] 
+				    << 0x11U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[5U] 
 						 >> 0xfU))))
-			   : vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[0U]));
+			   : vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_exe_mem_req.alu_result[0U]));
     __Vtemp142[1U] = ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_mem_fwd)
-		       ? ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
+		       ? ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
 					 << 0xbU) | 
-					(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] 
+					(vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] 
 					 >> 0x15U))))
 			   ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next[1U]
-			   : ((2U == (3U & ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
+			   : ((2U == (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
 					     << 0xbU) 
-					    | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] 
+					    | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] 
 					       >> 0x15U))))
-			       ? vlSymsp->TOP__Vortex__DOT__VX_mem_wb.mem_result[1U]
-			       : ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xaU] 
-				   << 0x1eU) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[9U] 
+			       ? vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_mem_wb.mem_result[1U]
+			       : ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xaU] 
+				   << 0x1eU) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[9U] 
 						>> 2U))))
 		       : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_wb_fwd)
-			   ? ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			   ? ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
 					     << 0x18U) 
-					    | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+					    | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					       >> 8U))))
 			       ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next[1U]
-			       : ((2U == (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			       : ((2U == (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
 						 << 0x18U) 
-						| (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+						| (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 						   >> 8U))))
-				   ? ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[3U] 
+				   ? ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[3U] 
 				       << 0x11U) | 
-				      (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+				      (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
 				       >> 0xfU)) : 
-				  ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[7U] 
-				    << 0x11U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[6U] 
+				  ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[7U] 
+				    << 0x11U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[6U] 
 						 >> 0xfU))))
-			   : vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[1U]));
+			   : vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_exe_mem_req.alu_result[1U]));
     __Vtemp142[2U] = ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_mem_fwd)
-		       ? ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
+		       ? ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
 					 << 0xbU) | 
-					(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] 
+					(vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] 
 					 >> 0x15U))))
 			   ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next[2U]
-			   : ((2U == (3U & ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
+			   : ((2U == (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
 					     << 0xbU) 
-					    | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] 
+					    | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] 
 					       >> 0x15U))))
-			       ? vlSymsp->TOP__Vortex__DOT__VX_mem_wb.mem_result[2U]
-			       : ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xbU] 
-				   << 0x1eU) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xaU] 
+			       ? vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_mem_wb.mem_result[2U]
+			       : ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xbU] 
+				   << 0x1eU) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xaU] 
 						>> 2U))))
 		       : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_wb_fwd)
-			   ? ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			   ? ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
 					     << 0x18U) 
-					    | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+					    | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					       >> 8U))))
 			       ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next[2U]
-			       : ((2U == (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			       : ((2U == (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
 						 << 0x18U) 
-						| (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+						| (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 						   >> 8U))))
-				   ? ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[4U] 
+				   ? ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[4U] 
 				       << 0x11U) | 
-				      (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[3U] 
+				      (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[3U] 
 				       >> 0xfU)) : 
-				  ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[8U] 
-				    << 0x11U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[7U] 
+				  ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[8U] 
+				    << 0x11U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[7U] 
 						 >> 0xfU))))
-			   : vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[2U]));
+			   : vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_exe_mem_req.alu_result[2U]));
     __Vtemp142[3U] = ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_mem_fwd)
-		       ? ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
+		       ? ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
 					 << 0xbU) | 
-					(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] 
+					(vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] 
 					 >> 0x15U))))
 			   ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next[3U]
-			   : ((2U == (3U & ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
+			   : ((2U == (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
 					     << 0xbU) 
-					    | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] 
+					    | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] 
 					       >> 0x15U))))
-			       ? vlSymsp->TOP__Vortex__DOT__VX_mem_wb.mem_result[3U]
-			       : ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xcU] 
-				   << 0x1eU) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xbU] 
+			       ? vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_mem_wb.mem_result[3U]
+			       : ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xcU] 
+				   << 0x1eU) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xbU] 
 						>> 2U))))
 		       : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_wb_fwd)
-			   ? ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			   ? ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
 					     << 0x18U) 
-					    | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+					    | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					       >> 8U))))
 			       ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next[3U]
-			       : ((2U == (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			       : ((2U == (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
 						 << 0x18U) 
-						| (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+						| (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 						   >> 8U))))
-				   ? ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[5U] 
+				   ? ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[5U] 
 				       << 0x11U) | 
-				      (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[4U] 
+				      (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[4U] 
 				       >> 0xfU)) : 
-				  ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[9U] 
-				    << 0x11U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[8U] 
+				  ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[9U] 
+				    << 0x11U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[8U] 
 						 >> 0xfU))))
-			   : vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[3U]));
+			   : vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_exe_mem_req.alu_result[3U]));
     vlTOPp->Vortex__DOT__vx_forwarding__DOT__out_src1_fwd_data[0U] 
 	= ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_exe_fwd)
-	    ? ((3U == (IData)(vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.wb))
+	    ? ((3U == (IData)(vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_exe_mem_req.wb))
 	        ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next[0U]
-	        : vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[0U])
+	        : vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_exe_mem_req.alu_result[0U])
 	    : __Vtemp142[0U]);
     vlTOPp->Vortex__DOT__vx_forwarding__DOT__out_src1_fwd_data[1U] 
 	= ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_exe_fwd)
-	    ? ((3U == (IData)(vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.wb))
+	    ? ((3U == (IData)(vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_exe_mem_req.wb))
 	        ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next[1U]
-	        : vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[1U])
+	        : vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_exe_mem_req.alu_result[1U])
 	    : __Vtemp142[1U]);
     vlTOPp->Vortex__DOT__vx_forwarding__DOT__out_src1_fwd_data[2U] 
 	= ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_exe_fwd)
-	    ? ((3U == (IData)(vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.wb))
+	    ? ((3U == (IData)(vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_exe_mem_req.wb))
 	        ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next[2U]
-	        : vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[2U])
+	        : vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_exe_mem_req.alu_result[2U])
 	    : __Vtemp142[2U]);
     vlTOPp->Vortex__DOT__vx_forwarding__DOT__out_src1_fwd_data[3U] 
 	= ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src1_exe_fwd)
-	    ? ((3U == (IData)(vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.wb))
+	    ? ((3U == (IData)(vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_exe_mem_req.wb))
 	        ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next[3U]
-	        : vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[3U])
+	        : vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_exe_mem_req.alu_result[3U])
 	    : __Vtemp142[3U]);
     __Vtemp158[0U] = ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_mem_fwd)
-		       ? ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
+		       ? ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
 					 << 0xbU) | 
-					(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] 
+					(vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] 
 					 >> 0x15U))))
 			   ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next[0U]
-			   : ((2U == (3U & ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
+			   : ((2U == (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
 					     << 0xbU) 
-					    | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] 
+					    | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] 
 					       >> 0x15U))))
-			       ? vlSymsp->TOP__Vortex__DOT__VX_mem_wb.mem_result[0U]
-			       : ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[9U] 
-				   << 0x1eU) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
+			       ? vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_mem_wb.mem_result[0U]
+			       : ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[9U] 
+				   << 0x1eU) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
 						>> 2U))))
 		       : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_wb_fwd)
-			   ? ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			   ? ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
 					     << 0x18U) 
-					    | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+					    | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					       >> 8U))))
 			       ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next[0U]
-			       : ((2U == (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			       : ((2U == (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
 						 << 0x18U) 
-						| (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+						| (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 						   >> 8U))))
-				   ? ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+				   ? ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
 				       << 0x11U) | 
-				      (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+				      (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 				       >> 0xfU)) : 
-				  ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[6U] 
-				    << 0x11U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[5U] 
+				  ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[6U] 
+				    << 0x11U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[5U] 
 						 >> 0xfU))))
-			   : vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[0U]));
+			   : vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_exe_mem_req.alu_result[0U]));
     __Vtemp158[1U] = ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_mem_fwd)
-		       ? ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
+		       ? ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
 					 << 0xbU) | 
-					(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] 
+					(vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] 
 					 >> 0x15U))))
 			   ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next[1U]
-			   : ((2U == (3U & ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
+			   : ((2U == (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
 					     << 0xbU) 
-					    | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] 
+					    | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] 
 					       >> 0x15U))))
-			       ? vlSymsp->TOP__Vortex__DOT__VX_mem_wb.mem_result[1U]
-			       : ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xaU] 
-				   << 0x1eU) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[9U] 
+			       ? vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_mem_wb.mem_result[1U]
+			       : ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xaU] 
+				   << 0x1eU) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[9U] 
 						>> 2U))))
 		       : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_wb_fwd)
-			   ? ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			   ? ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
 					     << 0x18U) 
-					    | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+					    | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					       >> 8U))))
 			       ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next[1U]
-			       : ((2U == (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			       : ((2U == (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
 						 << 0x18U) 
-						| (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+						| (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 						   >> 8U))))
-				   ? ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[3U] 
+				   ? ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[3U] 
 				       << 0x11U) | 
-				      (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+				      (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
 				       >> 0xfU)) : 
-				  ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[7U] 
-				    << 0x11U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[6U] 
+				  ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[7U] 
+				    << 0x11U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[6U] 
 						 >> 0xfU))))
-			   : vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[1U]));
+			   : vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_exe_mem_req.alu_result[1U]));
     __Vtemp158[2U] = ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_mem_fwd)
-		       ? ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
+		       ? ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
 					 << 0xbU) | 
-					(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] 
+					(vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] 
 					 >> 0x15U))))
 			   ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next[2U]
-			   : ((2U == (3U & ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
+			   : ((2U == (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
 					     << 0xbU) 
-					    | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] 
+					    | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] 
 					       >> 0x15U))))
-			       ? vlSymsp->TOP__Vortex__DOT__VX_mem_wb.mem_result[2U]
-			       : ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xbU] 
-				   << 0x1eU) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xaU] 
+			       ? vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_mem_wb.mem_result[2U]
+			       : ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xbU] 
+				   << 0x1eU) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xaU] 
 						>> 2U))))
 		       : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_wb_fwd)
-			   ? ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			   ? ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
 					     << 0x18U) 
-					    | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+					    | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					       >> 8U))))
 			       ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next[2U]
-			       : ((2U == (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			       : ((2U == (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
 						 << 0x18U) 
-						| (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+						| (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 						   >> 8U))))
-				   ? ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[4U] 
+				   ? ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[4U] 
 				       << 0x11U) | 
-				      (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[3U] 
+				      (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[3U] 
 				       >> 0xfU)) : 
-				  ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[8U] 
-				    << 0x11U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[7U] 
+				  ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[8U] 
+				    << 0x11U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[7U] 
 						 >> 0xfU))))
-			   : vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[2U]));
+			   : vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_exe_mem_req.alu_result[2U]));
     __Vtemp158[3U] = ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_mem_fwd)
-		       ? ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
+		       ? ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
 					 << 0xbU) | 
-					(vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] 
+					(vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] 
 					 >> 0x15U))))
 			   ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next[3U]
-			   : ((2U == (3U & ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
+			   : ((2U == (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[8U] 
 					     << 0xbU) 
-					    | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] 
+					    | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[7U] 
 					       >> 0x15U))))
-			       ? vlSymsp->TOP__Vortex__DOT__VX_mem_wb.mem_result[3U]
-			       : ((vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xcU] 
-				   << 0x1eU) | (vlTOPp->Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xbU] 
+			       ? vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_mem_wb.mem_result[3U]
+			       : ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xcU] 
+				   << 0x1eU) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value[0xbU] 
 						>> 2U))))
 		       : ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_wb_fwd)
-			   ? ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			   ? ((3U == (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
 					     << 0x18U) 
-					    | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+					    | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 					       >> 8U))))
 			       ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next[3U]
-			       : ((2U == (3U & ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
+			       : ((2U == (3U & ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[2U] 
 						 << 0x18U) 
-						| (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
+						| (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[1U] 
 						   >> 8U))))
-				   ? ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[5U] 
+				   ? ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[5U] 
 				       << 0x11U) | 
-				      (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[4U] 
+				      (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[4U] 
 				       >> 0xfU)) : 
-				  ((vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[9U] 
-				    << 0x11U) | (vlTOPp->Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[8U] 
+				  ((vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[9U] 
+				    << 0x11U) | (vlTOPp->Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value[8U] 
 						 >> 0xfU))))
-			   : vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[3U]));
+			   : vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_exe_mem_req.alu_result[3U]));
     vlTOPp->Vortex__DOT__vx_forwarding__DOT__out_src2_fwd_data[0U] 
 	= ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_exe_fwd)
-	    ? ((3U == (IData)(vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.wb))
+	    ? ((3U == (IData)(vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_exe_mem_req.wb))
 	        ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next[0U]
-	        : vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[0U])
+	        : vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_exe_mem_req.alu_result[0U])
 	    : __Vtemp158[0U]);
     vlTOPp->Vortex__DOT__vx_forwarding__DOT__out_src2_fwd_data[1U] 
 	= ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_exe_fwd)
-	    ? ((3U == (IData)(vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.wb))
+	    ? ((3U == (IData)(vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_exe_mem_req.wb))
 	        ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next[1U]
-	        : vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[1U])
+	        : vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_exe_mem_req.alu_result[1U])
 	    : __Vtemp158[1U]);
     vlTOPp->Vortex__DOT__vx_forwarding__DOT__out_src2_fwd_data[2U] 
 	= ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_exe_fwd)
-	    ? ((3U == (IData)(vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.wb))
+	    ? ((3U == (IData)(vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_exe_mem_req.wb))
 	        ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next[2U]
-	        : vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[2U])
+	        : vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_exe_mem_req.alu_result[2U])
 	    : __Vtemp158[2U]);
     vlTOPp->Vortex__DOT__vx_forwarding__DOT__out_src2_fwd_data[3U] 
 	= ((IData)(vlTOPp->Vortex__DOT__vx_forwarding__DOT__src2_exe_fwd)
-	    ? ((3U == (IData)(vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.wb))
+	    ? ((3U == (IData)(vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_exe_mem_req.wb))
 	        ? vlTOPp->Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next[3U]
-	        : vlSymsp->TOP__Vortex__DOT__VX_exe_mem_req.alu_result[3U])
+	        : vlSymsp->TOP__Vortex__DOT__vx_back_end__DOT__VX_exe_mem_req.alu_result[3U])
 	    : __Vtemp158[3U]);
     vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_decode__DOT____Vcellout__VX_Context_zero__out_a_reg_data[0U] 
 	= ((0x6fU == (0x7fU & ((vlTOPp->Vortex__DOT__vx_front_end__DOT__vx_f_d_reg__DOT__f_d_reg__DOT__value[2U] 
@@ -13808,20 +13809,8 @@ void VVortex::_ctor_var_reset() {
     }}
     out_ebreak = VL_RAND_RESET_I(1);
     Vortex__DOT__execute_branch_stall = VL_RAND_RESET_I(1);
-    Vortex__DOT__csr_decode_csr_data = VL_RAND_RESET_I(32);
     Vortex__DOT__forwarding_fwd_stall = VL_RAND_RESET_I(1);
-    { int __Vi0=0; for (; __Vi0<4; ++__Vi0) {
-	    Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_valid[__Vi0] = VL_RAND_RESET_I(1);
-    }}
-    { int __Vi0=0; for (; __Vi0<4; ++__Vi0) {
-	    Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_data[__Vi0] = VL_RAND_RESET_I(32);
-    }}
-    { int __Vi0=0; for (; __Vi0<4; ++__Vi0) {
-	    Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_address[__Vi0] = VL_RAND_RESET_I(32);
-    }}
-    { int __Vi0=0; for (; __Vi0<4; ++__Vi0) {
-	    Vortex__DOT____Vcellinp__vx_memory__in_cache_driver_out_data[__Vi0] = VL_RAND_RESET_I(32);
-    }}
+    Vortex__DOT__csr_decode_csr_data = VL_RAND_RESET_I(32);
     Vortex__DOT__vx_front_end__DOT__decode_branch_stall = VL_RAND_RESET_I(1);
     { int __Vi0=0; for (; __Vi0<4; ++__Vi0) {
 	    Vortex__DOT__vx_front_end__DOT__vx_fetch__DOT__in_thread_mask[__Vi0] = VL_RAND_RESET_I(1);
@@ -14155,23 +14144,23 @@ void VVortex::_ctor_var_reset() {
     VL_RAND_RESET_W(1024,Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__genblk2__BRA__7__KET____DOT__VX_Context_one__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers);
     VL_RAND_RESET_W(490,Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT____Vcellinp__d_e_reg__in);
     VL_RAND_RESET_W(490,Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value);
-    Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__0__KET____DOT__vx_alu__out_alu_result = VL_RAND_RESET_I(32);
-    Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__1__KET____DOT__vx_alu__out_alu_result = VL_RAND_RESET_I(32);
-    Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__2__KET____DOT__vx_alu__out_alu_result = VL_RAND_RESET_I(32);
-    Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__3__KET____DOT__vx_alu__out_alu_result = VL_RAND_RESET_I(32);
-    Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2 = VL_RAND_RESET_I(32);
-    Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__mult_signed_result = VL_RAND_RESET_Q(64);
-    Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2 = VL_RAND_RESET_I(32);
-    Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__mult_signed_result = VL_RAND_RESET_Q(64);
-    Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2 = VL_RAND_RESET_I(32);
-    Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__mult_signed_result = VL_RAND_RESET_Q(64);
-    Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2 = VL_RAND_RESET_I(32);
-    Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__mult_signed_result = VL_RAND_RESET_Q(64);
-    VL_RAND_RESET_W(464,Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in);
-    VL_RAND_RESET_W(464,Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value);
-    Vortex__DOT__vx_memory__DOT__temp_branch_dir = VL_RAND_RESET_I(1);
-    VL_RAND_RESET_W(303,Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value);
-    VL_RAND_RESET_W(128,Vortex__DOT__vx_writeback__DOT__out_pc_data);
+    Vortex__DOT__vx_back_end__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__0__KET____DOT__vx_alu__out_alu_result = VL_RAND_RESET_I(32);
+    Vortex__DOT__vx_back_end__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__1__KET____DOT__vx_alu__out_alu_result = VL_RAND_RESET_I(32);
+    Vortex__DOT__vx_back_end__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__2__KET____DOT__vx_alu__out_alu_result = VL_RAND_RESET_I(32);
+    Vortex__DOT__vx_back_end__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__3__KET____DOT__vx_alu__out_alu_result = VL_RAND_RESET_I(32);
+    Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2 = VL_RAND_RESET_I(32);
+    Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__mult_signed_result = VL_RAND_RESET_Q(64);
+    Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2 = VL_RAND_RESET_I(32);
+    Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__mult_signed_result = VL_RAND_RESET_Q(64);
+    Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2 = VL_RAND_RESET_I(32);
+    Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__mult_signed_result = VL_RAND_RESET_Q(64);
+    Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2 = VL_RAND_RESET_I(32);
+    Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__mult_signed_result = VL_RAND_RESET_Q(64);
+    VL_RAND_RESET_W(464,Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in);
+    VL_RAND_RESET_W(464,Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value);
+    Vortex__DOT__vx_back_end__DOT__vx_memory__DOT__temp_branch_dir = VL_RAND_RESET_I(1);
+    VL_RAND_RESET_W(303,Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value);
+    VL_RAND_RESET_W(128,Vortex__DOT__vx_back_end__DOT__vx_writeback__DOT__out_pc_data);
     Vortex__DOT__vx_forwarding__DOT__out_src1_fwd = VL_RAND_RESET_I(1);
     Vortex__DOT__vx_forwarding__DOT__out_src2_fwd = VL_RAND_RESET_I(1);
     VL_RAND_RESET_W(128,Vortex__DOT__vx_forwarding__DOT__out_src1_fwd_data);
diff --git a/rtl/obj_dir/VVortex.h b/rtl/obj_dir/VVortex.h
index b4755ca2..2496054c 100644
--- a/rtl/obj_dir/VVortex.h
+++ b/rtl/obj_dir/VVortex.h
@@ -11,13 +11,15 @@
 #include "verilated.h"
 
 class VVortex__Syms;
-class VVortex_VX_inst_meta_inter;
+class VVortex_VX_dcache_response_inter;
+class VVortex_VX_dcache_request_inter;
 class VVortex_VX_frE_to_bckE_req_inter;
-class VVortex_VX_mem_req_inter;
-class VVortex_VX_inst_mem_wb_inter;
 class VVortex_VX_wb_inter;
 class VVortex_VX_branch_response_inter;
 class VVortex_VX_warp_ctl_inter;
+class VVortex_VX_inst_meta_inter;
+class VVortex_VX_mem_req_inter;
+class VVortex_VX_inst_mem_wb_inter;
 
 //----------
 
@@ -26,17 +28,18 @@ VL_MODULE(VVortex) {
     // CELLS
     // Public to allow access to /*verilator_public*/ items;
     // otherwise the application code can consider these internals.
-    VVortex_VX_inst_meta_inter*	__PVT__Vortex__DOT__fd_inst_meta_de;
+    VVortex_VX_dcache_response_inter*	__PVT__Vortex__DOT__VX_dcache_rsp;
+    VVortex_VX_dcache_request_inter*	__PVT__Vortex__DOT__VX_dcache_req;
     VVortex_VX_frE_to_bckE_req_inter*	__PVT__Vortex__DOT__VX_bckE_req;
-    VVortex_VX_mem_req_inter*	__PVT__Vortex__DOT__VX_exe_mem_req;
-    VVortex_VX_mem_req_inter*	__PVT__Vortex__DOT__VX_mem_req;
-    VVortex_VX_inst_mem_wb_inter*	__PVT__Vortex__DOT__VX_mem_wb;
     VVortex_VX_wb_inter*	__PVT__Vortex__DOT__VX_writeback_inter;
     VVortex_VX_branch_response_inter*	__PVT__Vortex__DOT__VX_branch_rsp;
     VVortex_VX_warp_ctl_inter*	__PVT__Vortex__DOT__vx_front_end__DOT__VX_warp_ctl;
     VVortex_VX_inst_meta_inter*	__PVT__Vortex__DOT__vx_front_end__DOT__fe_inst_meta_fd;
     VVortex_VX_frE_to_bckE_req_inter*	__PVT__Vortex__DOT__vx_front_end__DOT__VX_frE_to_bckE_req;
     VVortex_VX_inst_meta_inter*	__PVT__Vortex__DOT__vx_front_end__DOT__fd_inst_meta_de;
+    VVortex_VX_mem_req_inter*	__PVT__Vortex__DOT__vx_back_end__DOT__VX_exe_mem_req;
+    VVortex_VX_mem_req_inter*	__PVT__Vortex__DOT__vx_back_end__DOT__VX_mem_req;
+    VVortex_VX_inst_mem_wb_inter*	__PVT__Vortex__DOT__vx_back_end__DOT__VX_mem_wb;
     
     // PORTS
     // The application code writes and reads these signals to
@@ -130,7 +133,7 @@ VL_MODULE(VVortex) {
 	VL_SIG8(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__genblk2__BRA__6__KET____DOT__VX_Context_one__DOT__wspawn_state_stall,5,0);
 	VL_SIG8(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__genblk2__BRA__7__KET____DOT__VX_Context_one__DOT__clone_state_stall,5,0);
 	VL_SIG8(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__genblk2__BRA__7__KET____DOT__VX_Context_one__DOT__wspawn_state_stall,5,0);
-	VL_SIG8(Vortex__DOT__vx_memory__DOT__temp_branch_dir,0,0);
+	VL_SIG8(Vortex__DOT__vx_back_end__DOT__vx_memory__DOT__temp_branch_dir,0,0);
 	VL_SIG8(Vortex__DOT__vx_forwarding__DOT__out_src1_fwd,0,0);
 	VL_SIG8(Vortex__DOT__vx_forwarding__DOT__out_src2_fwd,0,0);
 	VL_SIG8(Vortex__DOT__vx_forwarding__DOT__src1_exe_fwd,0,0);
@@ -217,22 +220,22 @@ VL_MODULE(VVortex) {
 	VL_SIGW(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__genblk2__BRA__7__KET____DOT__VX_Context_one__DOT__gen_code_label__BRA__2__KET____DOT__vx_register_file_slave__DOT__registers,1023,0,32);
 	VL_SIGW(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__genblk2__BRA__7__KET____DOT__VX_Context_one__DOT__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__DOT__registers,1023,0,32);
 	VL_SIGW(Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT__d_e_reg__DOT__value,489,0,16);
-	VL_SIG(Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2,31,0);
-	VL_SIG(Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2,31,0);
-	VL_SIG(Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2,31,0);
-	VL_SIG(Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2,31,0);
-	VL_SIGW(Vortex__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value,463,0,15);
-	VL_SIGW(Vortex__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value,302,0,10);
-	VL_SIGW(Vortex__DOT__vx_writeback__DOT__out_pc_data,127,0,4);
+	VL_SIG(Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__ALU_in2,31,0);
+	VL_SIG(Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__ALU_in2,31,0);
+	VL_SIG(Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__ALU_in2,31,0);
+	VL_SIG(Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__ALU_in2,31,0);
+	VL_SIGW(Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT__f_d_reg__DOT__value,463,0,15);
+	VL_SIGW(Vortex__DOT__vx_back_end__DOT__vx_m_w_reg__DOT__m_w_reg__DOT__value,302,0,10);
+	VL_SIGW(Vortex__DOT__vx_back_end__DOT__vx_writeback__DOT__out_pc_data,127,0,4);
 	VL_SIGW(Vortex__DOT__vx_forwarding__DOT__out_src1_fwd_data,127,0,4);
 	VL_SIGW(Vortex__DOT__vx_forwarding__DOT__out_src2_fwd_data,127,0,4);
 	VL_SIGW(Vortex__DOT__vx_forwarding__DOT__use_execute_PC_next,127,0,4);
 	VL_SIGW(Vortex__DOT__vx_forwarding__DOT__use_memory_PC_next,127,0,4);
 	VL_SIGW(Vortex__DOT__vx_forwarding__DOT__use_writeback_PC_next,127,0,4);
-	VL_SIG64(Vortex__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__mult_signed_result,63,0);
-	VL_SIG64(Vortex__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__mult_signed_result,63,0);
-	VL_SIG64(Vortex__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__mult_signed_result,63,0);
-	VL_SIG64(Vortex__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__mult_signed_result,63,0);
+	VL_SIG64(Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__0__KET____DOT__vx_alu__DOT__mult_signed_result,63,0);
+	VL_SIG64(Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__1__KET____DOT__vx_alu__DOT__mult_signed_result,63,0);
+	VL_SIG64(Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__2__KET____DOT__vx_alu__DOT__mult_signed_result,63,0);
+	VL_SIG64(Vortex__DOT__vx_back_end__DOT__vx_execute__DOT__genblk1__BRA__3__KET____DOT__vx_alu__DOT__mult_signed_result,63,0);
 	VL_SIG64(Vortex__DOT__vx_csr_handler__DOT__cycle,63,0);
 	VL_SIG64(Vortex__DOT__vx_csr_handler__DOT__instret,63,0);
 	VL_SIG8(Vortex__DOT__vx_front_end__DOT__vx_fetch__DOT__in_thread_mask[4],0,0);
@@ -353,15 +356,11 @@ VL_MODULE(VVortex) {
 	VL_SIG(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__genblk2__BRA__7__KET____DOT__VX_Context_one__DOT____Vcellout__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__out_src2_data,31,0);
 	VL_SIG(Vortex__DOT__vx_front_end__DOT__vx_decode__DOT__genblk2__BRA__7__KET____DOT__VX_Context_one__DOT____Vcellout__gen_code_label__BRA__3__KET____DOT__vx_register_file_slave__out_src1_data,31,0);
 	VL_SIGW(Vortex__DOT__vx_front_end__DOT__vx_d_e_reg__DOT____Vcellinp__d_e_reg__in,489,0,16);
-	VL_SIG(Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__0__KET____DOT__vx_alu__out_alu_result,31,0);
-	VL_SIG(Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__1__KET____DOT__vx_alu__out_alu_result,31,0);
-	VL_SIG(Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__2__KET____DOT__vx_alu__out_alu_result,31,0);
-	VL_SIG(Vortex__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__3__KET____DOT__vx_alu__out_alu_result,31,0);
-	VL_SIGW(Vortex__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in,463,0,15);
-	VL_SIG8(Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_valid[4],0,0);
-	VL_SIG(Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_data[4],31,0);
-	VL_SIG(Vortex__DOT____Vcellout__vx_memory__out_cache_driver_in_address[4],31,0);
-	VL_SIG(Vortex__DOT____Vcellinp__vx_memory__in_cache_driver_out_data[4],31,0);
+	VL_SIG(Vortex__DOT__vx_back_end__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__0__KET____DOT__vx_alu__out_alu_result,31,0);
+	VL_SIG(Vortex__DOT__vx_back_end__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__1__KET____DOT__vx_alu__out_alu_result,31,0);
+	VL_SIG(Vortex__DOT__vx_back_end__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__2__KET____DOT__vx_alu__out_alu_result,31,0);
+	VL_SIG(Vortex__DOT__vx_back_end__DOT__vx_execute__DOT____Vcellout__genblk1__BRA__3__KET____DOT__vx_alu__out_alu_result,31,0);
+	VL_SIGW(Vortex__DOT__vx_back_end__DOT__vx_e_m_reg__DOT____Vcellinp__f_d_reg__in,463,0,15);
 	VL_SIG8(Vortex__DOT__vx_front_end__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__0__KET____DOT__VX_Warp__out_valid[4],0,0);
 	VL_SIG8(Vortex__DOT__vx_front_end__DOT__vx_fetch__DOT____Vcellinp__genblk2__BRA__0__KET____DOT__VX_Warp__in_thread_mask[4],0,0);
 	VL_SIG8(Vortex__DOT__vx_front_end__DOT__vx_fetch__DOT____Vcellout__genblk2__BRA__1__KET____DOT__VX_Warp__out_valid[4],0,0);
diff --git a/rtl/obj_dir/VVortex_VX_dcache_request_inter.cpp b/rtl/obj_dir/VVortex_VX_dcache_request_inter.cpp
new file mode 100644
index 00000000..313b0a0c
--- /dev/null
+++ b/rtl/obj_dir/VVortex_VX_dcache_request_inter.cpp
@@ -0,0 +1,44 @@
+// Verilated -*- C++ -*-
+// DESCRIPTION: Verilator output: Design implementation internals
+// See VVortex.h for the primary calling header
+
+#include "VVortex_VX_dcache_request_inter.h"
+#include "VVortex__Syms.h"
+
+
+//--------------------
+// STATIC VARIABLES
+
+
+//--------------------
+
+VL_CTOR_IMP(VVortex_VX_dcache_request_inter) {
+    // Reset internal values
+    // Reset structure values
+    _ctor_var_reset();
+}
+
+void VVortex_VX_dcache_request_inter::__Vconfigure(VVortex__Syms* vlSymsp, bool first) {
+    if (0 && first) {}  // Prevent unused
+    this->__VlSymsp = vlSymsp;
+}
+
+VVortex_VX_dcache_request_inter::~VVortex_VX_dcache_request_inter() {
+}
+
+//--------------------
+// Internal Methods
+
+void VVortex_VX_dcache_request_inter::_ctor_var_reset() {
+    VL_DEBUG_IF(VL_DBG_MSGF("+            VVortex_VX_dcache_request_inter::_ctor_var_reset\n"); );
+    // Body
+    { int __Vi0=0; for (; __Vi0<4; ++__Vi0) {
+	    out_cache_driver_in_address[__Vi0] = VL_RAND_RESET_I(32);
+    }}
+    { int __Vi0=0; for (; __Vi0<4; ++__Vi0) {
+	    out_cache_driver_in_valid[__Vi0] = VL_RAND_RESET_I(1);
+    }}
+    { int __Vi0=0; for (; __Vi0<4; ++__Vi0) {
+	    out_cache_driver_in_data[__Vi0] = VL_RAND_RESET_I(32);
+    }}
+}
diff --git a/rtl/obj_dir/VVortex_VX_dcache_request_inter.h b/rtl/obj_dir/VVortex_VX_dcache_request_inter.h
new file mode 100644
index 00000000..fcb71a5b
--- /dev/null
+++ b/rtl/obj_dir/VVortex_VX_dcache_request_inter.h
@@ -0,0 +1,49 @@
+// Verilated -*- C++ -*-
+// DESCRIPTION: Verilator output: Design internal header
+// See VVortex.h for the primary calling header
+
+#ifndef _VVortex_VX_dcache_request_inter_H_
+#define _VVortex_VX_dcache_request_inter_H_
+
+#include "verilated.h"
+
+class VVortex__Syms;
+
+//----------
+
+VL_MODULE(VVortex_VX_dcache_request_inter) {
+  public:
+    
+    // PORTS
+    
+    // LOCAL SIGNALS
+    // Begin mtask footprint  all: 
+    VL_SIG(out_cache_driver_in_address[4],31,0);
+    VL_SIG8(out_cache_driver_in_valid[4],0,0);
+    VL_SIG(out_cache_driver_in_data[4],31,0);
+    
+    // LOCAL VARIABLES
+    
+    // INTERNAL VARIABLES
+  private:
+    VVortex__Syms* __VlSymsp;  // Symbol table
+  public:
+    
+    // PARAMETERS
+    
+    // CONSTRUCTORS
+  private:
+    VL_UNCOPYABLE(VVortex_VX_dcache_request_inter);  ///< Copying not allowed
+  public:
+    VVortex_VX_dcache_request_inter(const char* name="TOP");
+    ~VVortex_VX_dcache_request_inter();
+    
+    // API METHODS
+    
+    // INTERNAL METHODS
+    void __Vconfigure(VVortex__Syms* symsp, bool first);
+  private:
+    void _ctor_var_reset() VL_ATTR_COLD;
+} VL_ATTR_ALIGNED(128);
+
+#endif // guard
diff --git a/rtl/obj_dir/VVortex_VX_dcache_response_inter.cpp b/rtl/obj_dir/VVortex_VX_dcache_response_inter.cpp
new file mode 100644
index 00000000..47ca26f5
--- /dev/null
+++ b/rtl/obj_dir/VVortex_VX_dcache_response_inter.cpp
@@ -0,0 +1,38 @@
+// Verilated -*- C++ -*-
+// DESCRIPTION: Verilator output: Design implementation internals
+// See VVortex.h for the primary calling header
+
+#include "VVortex_VX_dcache_response_inter.h"
+#include "VVortex__Syms.h"
+
+
+//--------------------
+// STATIC VARIABLES
+
+
+//--------------------
+
+VL_CTOR_IMP(VVortex_VX_dcache_response_inter) {
+    // Reset internal values
+    // Reset structure values
+    _ctor_var_reset();
+}
+
+void VVortex_VX_dcache_response_inter::__Vconfigure(VVortex__Syms* vlSymsp, bool first) {
+    if (0 && first) {}  // Prevent unused
+    this->__VlSymsp = vlSymsp;
+}
+
+VVortex_VX_dcache_response_inter::~VVortex_VX_dcache_response_inter() {
+}
+
+//--------------------
+// Internal Methods
+
+void VVortex_VX_dcache_response_inter::_ctor_var_reset() {
+    VL_DEBUG_IF(VL_DBG_MSGF("+            VVortex_VX_dcache_response_inter::_ctor_var_reset\n"); );
+    // Body
+    { int __Vi0=0; for (; __Vi0<4; ++__Vi0) {
+	    in_cache_driver_out_data[__Vi0] = VL_RAND_RESET_I(32);
+    }}
+}
diff --git a/rtl/obj_dir/VVortex_VX_dcache_response_inter.h b/rtl/obj_dir/VVortex_VX_dcache_response_inter.h
new file mode 100644
index 00000000..eb6e9652
--- /dev/null
+++ b/rtl/obj_dir/VVortex_VX_dcache_response_inter.h
@@ -0,0 +1,47 @@
+// Verilated -*- C++ -*-
+// DESCRIPTION: Verilator output: Design internal header
+// See VVortex.h for the primary calling header
+
+#ifndef _VVortex_VX_dcache_response_inter_H_
+#define _VVortex_VX_dcache_response_inter_H_
+
+#include "verilated.h"
+
+class VVortex__Syms;
+
+//----------
+
+VL_MODULE(VVortex_VX_dcache_response_inter) {
+  public:
+    
+    // PORTS
+    
+    // LOCAL SIGNALS
+    // Begin mtask footprint  all: 
+    VL_SIG(in_cache_driver_out_data[4],31,0);
+    
+    // LOCAL VARIABLES
+    
+    // INTERNAL VARIABLES
+  private:
+    VVortex__Syms* __VlSymsp;  // Symbol table
+  public:
+    
+    // PARAMETERS
+    
+    // CONSTRUCTORS
+  private:
+    VL_UNCOPYABLE(VVortex_VX_dcache_response_inter);  ///< Copying not allowed
+  public:
+    VVortex_VX_dcache_response_inter(const char* name="TOP");
+    ~VVortex_VX_dcache_response_inter();
+    
+    // API METHODS
+    
+    // INTERNAL METHODS
+    void __Vconfigure(VVortex__Syms* symsp, bool first);
+  private:
+    void _ctor_var_reset() VL_ATTR_COLD;
+} VL_ATTR_ALIGNED(128);
+
+#endif // guard
diff --git a/rtl/obj_dir/VVortex_VX_inst_mem_wb_inter.cpp b/rtl/obj_dir/VVortex_VX_inst_mem_wb_inter.cpp
index 1c160571..618352e8 100644
--- a/rtl/obj_dir/VVortex_VX_inst_mem_wb_inter.cpp
+++ b/rtl/obj_dir/VVortex_VX_inst_mem_wb_inter.cpp
@@ -30,7 +30,7 @@ VVortex_VX_inst_mem_wb_inter::~VVortex_VX_inst_mem_wb_inter() {
 // Internal Methods
 
 void VVortex_VX_inst_mem_wb_inter::_ctor_var_reset() {
-    VL_DEBUG_IF(VL_DBG_MSGF("+          VVortex_VX_inst_mem_wb_inter::_ctor_var_reset\n"); );
+    VL_DEBUG_IF(VL_DBG_MSGF("+            VVortex_VX_inst_mem_wb_inter::_ctor_var_reset\n"); );
     // Body
     VL_RAND_RESET_W(128,mem_result);
 }
diff --git a/rtl/obj_dir/VVortex_VX_mem_req_inter.cpp b/rtl/obj_dir/VVortex_VX_mem_req_inter.cpp
index 630a5f50..07fffd92 100644
--- a/rtl/obj_dir/VVortex_VX_mem_req_inter.cpp
+++ b/rtl/obj_dir/VVortex_VX_mem_req_inter.cpp
@@ -30,7 +30,7 @@ VVortex_VX_mem_req_inter::~VVortex_VX_mem_req_inter() {
 // Internal Methods
 
 void VVortex_VX_mem_req_inter::_ctor_var_reset() {
-    VL_DEBUG_IF(VL_DBG_MSGF("+          VVortex_VX_mem_req_inter::_ctor_var_reset\n"); );
+    VL_DEBUG_IF(VL_DBG_MSGF("+            VVortex_VX_mem_req_inter::_ctor_var_reset\n"); );
     // Body
     VL_RAND_RESET_W(128,alu_result);
     wb = VL_RAND_RESET_I(2);
diff --git a/rtl/obj_dir/VVortex__ALL.a b/rtl/obj_dir/VVortex__ALL.a
index 2ead90cb..588c0ba3 100644
Binary files a/rtl/obj_dir/VVortex__ALL.a and b/rtl/obj_dir/VVortex__ALL.a differ
diff --git a/rtl/obj_dir/VVortex__ALLcls.cpp b/rtl/obj_dir/VVortex__ALLcls.cpp
index efd79a24..c1cf596d 100644
--- a/rtl/obj_dir/VVortex__ALLcls.cpp
+++ b/rtl/obj_dir/VVortex__ALLcls.cpp
@@ -1,10 +1,12 @@
 // DESCRIPTION: Generated by verilator_includer via makefile
 #define VL_INCLUDE_OPT include
 #include "VVortex.cpp"
-#include "VVortex_VX_mem_req_inter.cpp"
-#include "VVortex_VX_inst_mem_wb_inter.cpp"
-#include "VVortex_VX_inst_meta_inter.cpp"
+#include "VVortex_VX_dcache_response_inter.cpp"
+#include "VVortex_VX_dcache_request_inter.cpp"
 #include "VVortex_VX_frE_to_bckE_req_inter.cpp"
 #include "VVortex_VX_wb_inter.cpp"
 #include "VVortex_VX_branch_response_inter.cpp"
 #include "VVortex_VX_warp_ctl_inter.cpp"
+#include "VVortex_VX_inst_meta_inter.cpp"
+#include "VVortex_VX_mem_req_inter.cpp"
+#include "VVortex_VX_inst_mem_wb_inter.cpp"
diff --git a/rtl/obj_dir/VVortex__ALLcls.d b/rtl/obj_dir/VVortex__ALLcls.d
index 32b4ce64..46fd55d7 100644
--- a/rtl/obj_dir/VVortex__ALLcls.d
+++ b/rtl/obj_dir/VVortex__ALLcls.d
@@ -1,10 +1,12 @@
 VVortex__ALLcls.o: VVortex__ALLcls.cpp VVortex.cpp VVortex.h \
  /usr/local/share/verilator/include/verilated.h \
  /usr/local/share/verilator/include/verilatedos.h VVortex__Syms.h \
- VVortex_VX_mem_req_inter.h VVortex_VX_inst_mem_wb_inter.h \
- VVortex_VX_inst_meta_inter.h VVortex_VX_frE_to_bckE_req_inter.h \
- VVortex_VX_wb_inter.h VVortex_VX_branch_response_inter.h \
- VVortex_VX_warp_ctl_inter.h VVortex_VX_mem_req_inter.cpp \
- VVortex_VX_inst_mem_wb_inter.cpp VVortex_VX_inst_meta_inter.cpp \
- VVortex_VX_frE_to_bckE_req_inter.cpp VVortex_VX_wb_inter.cpp \
- VVortex_VX_branch_response_inter.cpp VVortex_VX_warp_ctl_inter.cpp
+ VVortex_VX_dcache_response_inter.h VVortex_VX_dcache_request_inter.h \
+ VVortex_VX_frE_to_bckE_req_inter.h VVortex_VX_wb_inter.h \
+ VVortex_VX_branch_response_inter.h VVortex_VX_warp_ctl_inter.h \
+ VVortex_VX_inst_meta_inter.h VVortex_VX_mem_req_inter.h \
+ VVortex_VX_inst_mem_wb_inter.h VVortex_VX_dcache_response_inter.cpp \
+ VVortex_VX_dcache_request_inter.cpp VVortex_VX_frE_to_bckE_req_inter.cpp \
+ VVortex_VX_wb_inter.cpp VVortex_VX_branch_response_inter.cpp \
+ VVortex_VX_warp_ctl_inter.cpp VVortex_VX_inst_meta_inter.cpp \
+ VVortex_VX_mem_req_inter.cpp VVortex_VX_inst_mem_wb_inter.cpp
diff --git a/rtl/obj_dir/VVortex__ALLcls.o b/rtl/obj_dir/VVortex__ALLcls.o
index e18bbdf1..6838c437 100644
Binary files a/rtl/obj_dir/VVortex__ALLcls.o and b/rtl/obj_dir/VVortex__ALLcls.o differ
diff --git a/rtl/obj_dir/VVortex__ALLsup.d b/rtl/obj_dir/VVortex__ALLsup.d
index 90ef2005..4b60aa76 100644
--- a/rtl/obj_dir/VVortex__ALLsup.d
+++ b/rtl/obj_dir/VVortex__ALLsup.d
@@ -1,7 +1,8 @@
 VVortex__ALLsup.o: VVortex__ALLsup.cpp VVortex__Syms.cpp VVortex__Syms.h \
  /usr/local/share/verilator/include/verilated.h \
  /usr/local/share/verilator/include/verilatedos.h VVortex.h \
- VVortex_VX_mem_req_inter.h VVortex_VX_inst_mem_wb_inter.h \
- VVortex_VX_inst_meta_inter.h VVortex_VX_frE_to_bckE_req_inter.h \
- VVortex_VX_wb_inter.h VVortex_VX_branch_response_inter.h \
- VVortex_VX_warp_ctl_inter.h
+ VVortex_VX_dcache_response_inter.h VVortex_VX_dcache_request_inter.h \
+ VVortex_VX_frE_to_bckE_req_inter.h VVortex_VX_wb_inter.h \
+ VVortex_VX_branch_response_inter.h VVortex_VX_warp_ctl_inter.h \
+ VVortex_VX_inst_meta_inter.h VVortex_VX_mem_req_inter.h \
+ VVortex_VX_inst_mem_wb_inter.h
diff --git a/rtl/obj_dir/VVortex__ALLsup.o b/rtl/obj_dir/VVortex__ALLsup.o
index 2db89d17..c0df2604 100644
Binary files a/rtl/obj_dir/VVortex__ALLsup.o and b/rtl/obj_dir/VVortex__ALLsup.o differ
diff --git a/rtl/obj_dir/VVortex__Syms.cpp b/rtl/obj_dir/VVortex__Syms.cpp
index 0e72bae3..0ac77460 100644
--- a/rtl/obj_dir/VVortex__Syms.cpp
+++ b/rtl/obj_dir/VVortex__Syms.cpp
@@ -3,13 +3,15 @@
 
 #include "VVortex__Syms.h"
 #include "VVortex.h"
-#include "VVortex_VX_mem_req_inter.h"
-#include "VVortex_VX_inst_mem_wb_inter.h"
-#include "VVortex_VX_inst_meta_inter.h"
+#include "VVortex_VX_dcache_response_inter.h"
+#include "VVortex_VX_dcache_request_inter.h"
 #include "VVortex_VX_frE_to_bckE_req_inter.h"
 #include "VVortex_VX_wb_inter.h"
 #include "VVortex_VX_branch_response_inter.h"
 #include "VVortex_VX_warp_ctl_inter.h"
+#include "VVortex_VX_inst_meta_inter.h"
+#include "VVortex_VX_mem_req_inter.h"
+#include "VVortex_VX_inst_mem_wb_inter.h"
 
 // FUNCTIONS
 VVortex__Syms::VVortex__Syms(VVortex* topp, const char* namep)
@@ -18,9 +20,11 @@ VVortex__Syms::VVortex__Syms(VVortex* topp, const char* namep)
 	, __Vm_didInit(false)
 	// Setup submodule names
 	, TOP__Vortex__DOT__VX_branch_rsp (Verilated::catName(topp->name(),"Vortex.VX_branch_rsp"))
-	, TOP__Vortex__DOT__VX_exe_mem_req (Verilated::catName(topp->name(),"Vortex.VX_exe_mem_req"))
-	, TOP__Vortex__DOT__VX_mem_wb    (Verilated::catName(topp->name(),"Vortex.VX_mem_wb"))
+	, TOP__Vortex__DOT__VX_dcache_req (Verilated::catName(topp->name(),"Vortex.VX_dcache_req"))
+	, TOP__Vortex__DOT__VX_dcache_rsp (Verilated::catName(topp->name(),"Vortex.VX_dcache_rsp"))
 	, TOP__Vortex__DOT__VX_writeback_inter (Verilated::catName(topp->name(),"Vortex.VX_writeback_inter"))
+	, TOP__Vortex__DOT__vx_back_end__DOT__VX_exe_mem_req (Verilated::catName(topp->name(),"Vortex.vx_back_end.VX_exe_mem_req"))
+	, TOP__Vortex__DOT__vx_back_end__DOT__VX_mem_wb (Verilated::catName(topp->name(),"Vortex.vx_back_end.VX_mem_wb"))
 	, TOP__Vortex__DOT__vx_front_end__DOT__VX_frE_to_bckE_req (Verilated::catName(topp->name(),"Vortex.vx_front_end.VX_frE_to_bckE_req"))
 	, TOP__Vortex__DOT__vx_front_end__DOT__VX_warp_ctl (Verilated::catName(topp->name(),"Vortex.vx_front_end.VX_warp_ctl"))
 	, TOP__Vortex__DOT__vx_front_end__DOT__fe_inst_meta_fd (Verilated::catName(topp->name(),"Vortex.vx_front_end.fe_inst_meta_fd"))
@@ -29,18 +33,22 @@ VVortex__Syms::VVortex__Syms(VVortex* topp, const char* namep)
     TOPp = topp;
     // Setup each module's pointers to their submodules
     TOPp->__PVT__Vortex__DOT__VX_branch_rsp  = &TOP__Vortex__DOT__VX_branch_rsp;
-    TOPp->__PVT__Vortex__DOT__VX_exe_mem_req  = &TOP__Vortex__DOT__VX_exe_mem_req;
-    TOPp->__PVT__Vortex__DOT__VX_mem_wb  = &TOP__Vortex__DOT__VX_mem_wb;
+    TOPp->__PVT__Vortex__DOT__VX_dcache_req  = &TOP__Vortex__DOT__VX_dcache_req;
+    TOPp->__PVT__Vortex__DOT__VX_dcache_rsp  = &TOP__Vortex__DOT__VX_dcache_rsp;
     TOPp->__PVT__Vortex__DOT__VX_writeback_inter  = &TOP__Vortex__DOT__VX_writeback_inter;
+    TOPp->__PVT__Vortex__DOT__vx_back_end__DOT__VX_exe_mem_req  = &TOP__Vortex__DOT__vx_back_end__DOT__VX_exe_mem_req;
+    TOPp->__PVT__Vortex__DOT__vx_back_end__DOT__VX_mem_wb  = &TOP__Vortex__DOT__vx_back_end__DOT__VX_mem_wb;
     TOPp->__PVT__Vortex__DOT__vx_front_end__DOT__VX_frE_to_bckE_req  = &TOP__Vortex__DOT__vx_front_end__DOT__VX_frE_to_bckE_req;
     TOPp->__PVT__Vortex__DOT__vx_front_end__DOT__VX_warp_ctl  = &TOP__Vortex__DOT__vx_front_end__DOT__VX_warp_ctl;
     TOPp->__PVT__Vortex__DOT__vx_front_end__DOT__fe_inst_meta_fd  = &TOP__Vortex__DOT__vx_front_end__DOT__fe_inst_meta_fd;
     // Setup each module's pointer back to symbol table (for public functions)
     TOPp->__Vconfigure(this, true);
     TOP__Vortex__DOT__VX_branch_rsp.__Vconfigure(this, true);
-    TOP__Vortex__DOT__VX_exe_mem_req.__Vconfigure(this, true);
-    TOP__Vortex__DOT__VX_mem_wb.__Vconfigure(this, true);
+    TOP__Vortex__DOT__VX_dcache_req.__Vconfigure(this, true);
+    TOP__Vortex__DOT__VX_dcache_rsp.__Vconfigure(this, true);
     TOP__Vortex__DOT__VX_writeback_inter.__Vconfigure(this, true);
+    TOP__Vortex__DOT__vx_back_end__DOT__VX_exe_mem_req.__Vconfigure(this, true);
+    TOP__Vortex__DOT__vx_back_end__DOT__VX_mem_wb.__Vconfigure(this, true);
     TOP__Vortex__DOT__vx_front_end__DOT__VX_frE_to_bckE_req.__Vconfigure(this, true);
     TOP__Vortex__DOT__vx_front_end__DOT__VX_warp_ctl.__Vconfigure(this, true);
     TOP__Vortex__DOT__vx_front_end__DOT__fe_inst_meta_fd.__Vconfigure(this, true);
diff --git a/rtl/obj_dir/VVortex__Syms.h b/rtl/obj_dir/VVortex__Syms.h
index b84690ad..6a87cc44 100644
--- a/rtl/obj_dir/VVortex__Syms.h
+++ b/rtl/obj_dir/VVortex__Syms.h
@@ -11,13 +11,15 @@
 
 // INCLUDE MODULE CLASSES
 #include "VVortex.h"
-#include "VVortex_VX_mem_req_inter.h"
-#include "VVortex_VX_inst_mem_wb_inter.h"
-#include "VVortex_VX_inst_meta_inter.h"
+#include "VVortex_VX_dcache_response_inter.h"
+#include "VVortex_VX_dcache_request_inter.h"
 #include "VVortex_VX_frE_to_bckE_req_inter.h"
 #include "VVortex_VX_wb_inter.h"
 #include "VVortex_VX_branch_response_inter.h"
 #include "VVortex_VX_warp_ctl_inter.h"
+#include "VVortex_VX_inst_meta_inter.h"
+#include "VVortex_VX_mem_req_inter.h"
+#include "VVortex_VX_inst_mem_wb_inter.h"
 
 // SYMS CLASS
 class VVortex__Syms : public VerilatedSyms {
@@ -30,9 +32,11 @@ class VVortex__Syms : public VerilatedSyms {
     // SUBCELL STATE
     VVortex*                       TOPp;
     VVortex_VX_branch_response_inter TOP__Vortex__DOT__VX_branch_rsp;
-    VVortex_VX_mem_req_inter       TOP__Vortex__DOT__VX_exe_mem_req;
-    VVortex_VX_inst_mem_wb_inter   TOP__Vortex__DOT__VX_mem_wb;
+    VVortex_VX_dcache_request_inter TOP__Vortex__DOT__VX_dcache_req;
+    VVortex_VX_dcache_response_inter TOP__Vortex__DOT__VX_dcache_rsp;
     VVortex_VX_wb_inter            TOP__Vortex__DOT__VX_writeback_inter;
+    VVortex_VX_mem_req_inter       TOP__Vortex__DOT__vx_back_end__DOT__VX_exe_mem_req;
+    VVortex_VX_inst_mem_wb_inter   TOP__Vortex__DOT__vx_back_end__DOT__VX_mem_wb;
     VVortex_VX_frE_to_bckE_req_inter TOP__Vortex__DOT__vx_front_end__DOT__VX_frE_to_bckE_req;
     VVortex_VX_warp_ctl_inter      TOP__Vortex__DOT__vx_front_end__DOT__VX_warp_ctl;
     VVortex_VX_inst_meta_inter     TOP__Vortex__DOT__vx_front_end__DOT__fe_inst_meta_fd;
diff --git a/rtl/obj_dir/VVortex__ver.d b/rtl/obj_dir/VVortex__ver.d
index 62ade11d..3ccc6490 100644
--- a/rtl/obj_dir/VVortex__ver.d
+++ b/rtl/obj_dir/VVortex__ver.d
@@ -1 +1 @@
-obj_dir/VVortex.cpp obj_dir/VVortex.h obj_dir/VVortex.mk obj_dir/VVortex_VX_branch_response_inter.cpp obj_dir/VVortex_VX_branch_response_inter.h obj_dir/VVortex_VX_frE_to_bckE_req_inter.cpp obj_dir/VVortex_VX_frE_to_bckE_req_inter.h obj_dir/VVortex_VX_inst_mem_wb_inter.cpp obj_dir/VVortex_VX_inst_mem_wb_inter.h obj_dir/VVortex_VX_inst_meta_inter.cpp obj_dir/VVortex_VX_inst_meta_inter.h obj_dir/VVortex_VX_mem_req_inter.cpp obj_dir/VVortex_VX_mem_req_inter.h obj_dir/VVortex_VX_warp_ctl_inter.cpp obj_dir/VVortex_VX_warp_ctl_inter.h obj_dir/VVortex_VX_wb_inter.cpp obj_dir/VVortex_VX_wb_inter.h obj_dir/VVortex__Syms.cpp obj_dir/VVortex__Syms.h obj_dir/VVortex__ver.d obj_dir/VVortex_classes.mk  : /usr/local/bin/verilator_bin /usr/local/bin/verilator_bin VX_alu.v VX_context.v VX_context_slave.v VX_csr_handler.v VX_decode.v VX_define.v VX_execute.v VX_fetch.v VX_forwarding.v VX_front_end.v VX_generic_register.v VX_memory.v VX_register_file.v VX_register_file_master_slave.v VX_register_file_slave.v VX_warp.v VX_writeback.v Vortex.v interfaces//VX_branch_response_inter.v interfaces//VX_forward_exe_inter.v interfaces//VX_forward_mem_inter.sv interfaces//VX_forward_reqeust_inter.v interfaces//VX_forward_response_inter.v interfaces//VX_forward_wb_inter.v interfaces//VX_frE_to_bckE_req_inter.v interfaces//VX_icache_request_inter.v interfaces//VX_icache_response_inter.v interfaces//VX_inst_mem_wb_inter.v interfaces//VX_inst_meta_inter.v interfaces//VX_jal_response_inter.v interfaces//VX_mem_req_inter.v interfaces//VX_mw_wb_inter.v interfaces//VX_warp_ctl_inter.v interfaces//VX_wb_inter.v pipe_regs//VX_d_e_reg.v pipe_regs//VX_e_m_reg.v pipe_regs//VX_f_d_reg.v pipe_regs//VX_m_w_reg.v 
+obj_dir/VVortex.cpp obj_dir/VVortex.h obj_dir/VVortex.mk obj_dir/VVortex_VX_branch_response_inter.cpp obj_dir/VVortex_VX_branch_response_inter.h obj_dir/VVortex_VX_dcache_request_inter.cpp obj_dir/VVortex_VX_dcache_request_inter.h obj_dir/VVortex_VX_dcache_response_inter.cpp obj_dir/VVortex_VX_dcache_response_inter.h obj_dir/VVortex_VX_frE_to_bckE_req_inter.cpp obj_dir/VVortex_VX_frE_to_bckE_req_inter.h obj_dir/VVortex_VX_inst_mem_wb_inter.cpp obj_dir/VVortex_VX_inst_mem_wb_inter.h obj_dir/VVortex_VX_inst_meta_inter.cpp obj_dir/VVortex_VX_inst_meta_inter.h obj_dir/VVortex_VX_mem_req_inter.cpp obj_dir/VVortex_VX_mem_req_inter.h obj_dir/VVortex_VX_warp_ctl_inter.cpp obj_dir/VVortex_VX_warp_ctl_inter.h obj_dir/VVortex_VX_wb_inter.cpp obj_dir/VVortex_VX_wb_inter.h obj_dir/VVortex__Syms.cpp obj_dir/VVortex__Syms.h obj_dir/VVortex__ver.d obj_dir/VVortex_classes.mk  : /usr/local/bin/verilator_bin /usr/local/bin/verilator_bin VX_alu.v VX_back_end.v VX_context.v VX_context_slave.v VX_csr_handler.v VX_decode.v VX_define.v VX_execute.v VX_fetch.v VX_forwarding.v VX_front_end.v VX_generic_register.v VX_memory.v VX_register_file.v VX_register_file_master_slave.v VX_register_file_slave.v VX_warp.v VX_writeback.v Vortex.v interfaces//VX_branch_response_inter.v interfaces//VX_csr_write_request_inter.v interfaces//VX_dcache_request_inter.v interfaces//VX_dcache_response_inter.v interfaces//VX_forward_exe_inter.v interfaces//VX_forward_mem_inter.sv interfaces//VX_forward_reqeust_inter.v interfaces//VX_forward_response_inter.v interfaces//VX_forward_wb_inter.v interfaces//VX_frE_to_bckE_req_inter.v interfaces//VX_icache_request_inter.v interfaces//VX_icache_response_inter.v interfaces//VX_inst_mem_wb_inter.v interfaces//VX_inst_meta_inter.v interfaces//VX_jal_response_inter.v interfaces//VX_mem_req_inter.v interfaces//VX_mw_wb_inter.v interfaces//VX_warp_ctl_inter.v interfaces//VX_wb_inter.v pipe_regs//VX_d_e_reg.v pipe_regs//VX_e_m_reg.v pipe_regs//VX_f_d_reg.v pipe_regs//VX_m_w_reg.v 
diff --git a/rtl/obj_dir/VVortex__verFiles.dat b/rtl/obj_dir/VVortex__verFiles.dat
index f526fd46..f28ea801 100644
--- a/rtl/obj_dir/VVortex__verFiles.dat
+++ b/rtl/obj_dir/VVortex__verFiles.dat
@@ -2,9 +2,10 @@
 C "--compiler gcc -Wall -cc Vortex.v -Iinterfaces/ -Ipipe_regs/ --exe test_bench.cpp -CFLAGS -std=c++11 -O3"
 S   6746612 12892413243  1567548409           0  1567548409           0 "/usr/local/bin/verilator_bin"
 S      2785  1565236  1567474434           0  1567474434           0 "VX_alu.v"
+S      2767  1703128  1567984522           0  1567984522           0 "VX_back_end.v"
 S      3553  1572595  1567702966           0  1567702966           0 "VX_context.v"
 S      4995  1572594  1567702948           0  1567702948           0 "VX_context_slave.v"
-S      1650  1701571  1567981832           0  1567981832           0 "VX_csr_handler.v"
+S      1837  1768199  1567984564           0  1567984564           0 "VX_csr_handler.v"
 S     17085  1574349  1567973680           0  1567973680           0 "VX_decode.v"
 S      1676  1565244  1567474434           0  1567474434           0 "VX_define.v"
 S      3835  1573272  1567973378           0  1567973378           0 "VX_execute.v"
@@ -12,14 +13,17 @@ S      6520  1598760  1567980382           0  1567980382           0 "VX_fetch.v
 S      6148  1701713  1567982096           0  1567982096           0 "VX_forwarding.v"
 S      2719  1701603  1567981038           0  1567981038           0 "VX_front_end.v"
 S       399  1565278  1567537322           0  1567537322           0 "VX_generic_register.v"
-S      2746  1610915  1567979674           0  1567979674           0 "VX_memory.v"
+S      2584  1768087  1567983338           0  1567983338           0 "VX_memory.v"
 S      1249  1572596  1567702894           0  1567702894           0 "VX_register_file.v"
 S      1655  1572598  1567702916           0  1567702916           0 "VX_register_file_master_slave.v"
 S      1599  1572597  1567702888           0  1567702888           0 "VX_register_file_slave.v"
 S      1915  1565256  1567474434           0  1567474434           0 "VX_warp.v"
 S      1597  1704649  1567981924           0  1567981924           0 "VX_writeback.v"
-S      5502  1701604  1567981052           0  1567981052           0 "Vortex.v"
+S      4392  1703129  1567985238           0  1567985238           0 "Vortex.v"
 S       389  1610834  1567980040           0  1567980040           0 "interfaces//VX_branch_response_inter.v"
+S       474  1768191  1567983792           0  1567983792           0 "interfaces//VX_csr_write_request_inter.v"
+S       823  1703164  1567983106           0  1567983106           0 "interfaces//VX_dcache_request_inter.v"
+S       334  1768090  1567983128           0  1567983128           0 "interfaces//VX_dcache_response_inter.v"
 S       528  1573270  1567972030           0  1567972030           0 "interfaces//VX_forward_exe_inter.v"
 S       610  1573271  1567971856           0  1567971856           0 "interfaces//VX_forward_mem_inter.sv"
 S       377  1582724  1567978250           0  1567978250           0 "interfaces//VX_forward_reqeust_inter.v"
@@ -35,28 +39,32 @@ S       995  1572568  1567701364           0  1567701364           0 "interfaces
 S       654  1573355  1567969270           0  1567969270           0 "interfaces//VX_mw_wb_inter.v"
 S       603  1571976  1567568452           0  1567568452           0 "interfaces//VX_warp_ctl_inter.v"
 S       450  1572588  1567702406           0  1567702406           0 "interfaces//VX_wb_inter.v"
-T   1222614  1701587  1567982098           0  1567982098           0 "obj_dir/VVortex.cpp"
-T     44219  1701584  1567982098           0  1567982098           0 "obj_dir/VVortex.h"
-T      1791  1701678  1567982098           0  1567982098           0 "obj_dir/VVortex.mk"
-T       914  1701674  1567982098           0  1567982098           0 "obj_dir/VVortex_VX_branch_response_inter.cpp"
-T      1029  1701673  1567982098           0  1567982098           0 "obj_dir/VVortex_VX_branch_response_inter.h"
-T      1133  1701670  1567982098           0  1567982098           0 "obj_dir/VVortex_VX_frE_to_bckE_req_inter.cpp"
-T      1208  1701669  1567982098           0  1567982098           0 "obj_dir/VVortex_VX_frE_to_bckE_req_inter.h"
-T       882  1701666  1567982098           0  1567982098           0 "obj_dir/VVortex_VX_inst_mem_wb_inter.cpp"
-T      1008  1701665  1567982098           0  1567982098           0 "obj_dir/VVortex_VX_inst_mem_wb_inter.h"
-T       865  1701668  1567982098           0  1567982098           0 "obj_dir/VVortex_VX_inst_meta_inter.cpp"
-T       987  1701667  1567982098           0  1567982098           0 "obj_dir/VVortex_VX_inst_meta_inter.h"
-T       883  1701664  1567982098           0  1567982098           0 "obj_dir/VVortex_VX_mem_req_inter.cpp"
-T      1005  1701663  1567982098           0  1567982098           0 "obj_dir/VVortex_VX_mem_req_inter.h"
-T       902  1701676  1567982098           0  1567982098           0 "obj_dir/VVortex_VX_warp_ctl_inter.cpp"
-T      1017  1701675  1567982098           0  1567982098           0 "obj_dir/VVortex_VX_warp_ctl_inter.h"
-T       821  1701672  1567982098           0  1567982098           0 "obj_dir/VVortex_VX_wb_inter.cpp"
-T       954  1701671  1567982098           0  1567982098           0 "obj_dir/VVortex_VX_wb_inter.h"
-T      2771  1701575  1567982098           0  1567982098           0 "obj_dir/VVortex__Syms.cpp"
-T      1589  1701572  1567982098           0  1567982098           0 "obj_dir/VVortex__Syms.h"
-T      1697  1701679  1567982098           0  1567982098           0 "obj_dir/VVortex__ver.d"
-T         0        0  1567982098           0  1567982098           0 "obj_dir/VVortex__verFiles.dat"
-T      1459  1701677  1567982098           0  1567982098           0 "obj_dir/VVortex_classes.mk"
+T   1245424  1768261  1567985240           0  1567985240           0 "obj_dir/VVortex.cpp"
+T     44414  1768258  1567985240           0  1567985240           0 "obj_dir/VVortex.h"
+T      1791  1768353  1567985240           0  1567985240           0 "obj_dir/VVortex.mk"
+T       914  1768341  1567985240           0  1567985240           0 "obj_dir/VVortex_VX_branch_response_inter.cpp"
+T      1029  1768340  1567985240           0  1567985240           0 "obj_dir/VVortex_VX_branch_response_inter.h"
+T      1210  1768345  1567985240           0  1567985240           0 "obj_dir/VVortex_VX_dcache_request_inter.cpp"
+T      1135  1768344  1567985240           0  1567985240           0 "obj_dir/VVortex_VX_dcache_request_inter.h"
+T       988  1768343  1567985240           0  1567985240           0 "obj_dir/VVortex_VX_dcache_response_inter.cpp"
+T      1045  1768342  1567985240           0  1567985240           0 "obj_dir/VVortex_VX_dcache_response_inter.h"
+T      1133  1703195  1567985240           0  1567985240           0 "obj_dir/VVortex_VX_frE_to_bckE_req_inter.cpp"
+T      1208  1703186  1567985240           0  1567985240           0 "obj_dir/VVortex_VX_frE_to_bckE_req_inter.h"
+T       884  1768351  1567985240           0  1567985240           0 "obj_dir/VVortex_VX_inst_mem_wb_inter.cpp"
+T      1008  1768350  1567985240           0  1567985240           0 "obj_dir/VVortex_VX_inst_mem_wb_inter.h"
+T       865  1703171  1567985240           0  1567985240           0 "obj_dir/VVortex_VX_inst_meta_inter.cpp"
+T       987  1703170  1567985240           0  1567985240           0 "obj_dir/VVortex_VX_inst_meta_inter.h"
+T       885  1768349  1567985240           0  1567985240           0 "obj_dir/VVortex_VX_mem_req_inter.cpp"
+T      1005  1768348  1567985240           0  1567985240           0 "obj_dir/VVortex_VX_mem_req_inter.h"
+T       902  1768347  1567985240           0  1567985240           0 "obj_dir/VVortex_VX_warp_ctl_inter.cpp"
+T      1017  1768346  1567985240           0  1567985240           0 "obj_dir/VVortex_VX_warp_ctl_inter.h"
+T       821  1768339  1567985240           0  1567985240           0 "obj_dir/VVortex_VX_wb_inter.cpp"
+T       954  1768338  1567985240           0  1567985240           0 "obj_dir/VVortex_VX_wb_inter.h"
+T      3499  1703157  1567985240           0  1567985240           0 "obj_dir/VVortex__Syms.cpp"
+T      1855  1703150  1567985240           0  1567985240           0 "obj_dir/VVortex__Syms.h"
+T      2003  1768354  1567985240           0  1567985240           0 "obj_dir/VVortex__ver.d"
+T         0        0  1567985240           0  1567985240           0 "obj_dir/VVortex__verFiles.dat"
+T      1530  1768352  1567985240           0  1567985240           0 "obj_dir/VVortex_classes.mk"
 S      6179  1572602  1567698562           0  1567698562           0 "pipe_regs//VX_d_e_reg.v"
 S      1538  1573254  1567973402           0  1567973402           0 "pipe_regs//VX_e_m_reg.v"
 S       755  1591921  1567978394           0  1567978394           0 "pipe_regs//VX_f_d_reg.v"
diff --git a/rtl/obj_dir/VVortex_classes.mk b/rtl/obj_dir/VVortex_classes.mk
index 629fe257..84928790 100644
--- a/rtl/obj_dir/VVortex_classes.mk
+++ b/rtl/obj_dir/VVortex_classes.mk
@@ -18,13 +18,15 @@ VM_TRACE_THREADED = 0
 # Generated module classes, fast-path, compile with highest optimization
 VM_CLASSES_FAST += \
 	VVortex \
-	VVortex_VX_mem_req_inter \
-	VVortex_VX_inst_mem_wb_inter \
-	VVortex_VX_inst_meta_inter \
+	VVortex_VX_dcache_response_inter \
+	VVortex_VX_dcache_request_inter \
 	VVortex_VX_frE_to_bckE_req_inter \
 	VVortex_VX_wb_inter \
 	VVortex_VX_branch_response_inter \
 	VVortex_VX_warp_ctl_inter \
+	VVortex_VX_inst_meta_inter \
+	VVortex_VX_mem_req_inter \
+	VVortex_VX_inst_mem_wb_inter \
 
 # Generated module classes, non-fast-path, compile with low/medium optimization
 VM_CLASSES_SLOW += \
diff --git a/rtl/obj_dir/test_bench.o b/rtl/obj_dir/test_bench.o
index 8adbc22a..3de4539b 100644
Binary files a/rtl/obj_dir/test_bench.o and b/rtl/obj_dir/test_bench.o differ
diff --git a/rtl/results.txt b/rtl/results.txt
index 70a8f023..fe8b4ffa 100644
--- a/rtl/results.txt
+++ b/rtl/results.txt
@@ -3,5 +3,5 @@
 # of forwarding stalls: 0
 # of branch stalls:     0
 # CPI:                  1.01056
-# time to simulate:     2.19792e-314 milliseconds
+# time to simulate:     2.12501e-314 milliseconds
 # GRADE:                Failed on test: 4294967295