Bugfix-- registers now appropriately truncated.

git-svn-id: http://www.cdkersey.com/harp/harptool@117 0246edb2-e076-4747-b392-db732a341fa2

src/BUGS

@@ -1,2 +1,3 @@
+_ The assembly writer for the disassembler uses the old assembly format.
 _ The BYTE directive was not updated when the word directive was; inconsistent
   behavior.

src/Makefile

@@ -1,7 +1,7 @@
 ################################################################################
 # HARPtools by Chad D. Kersey, Summer 2011                                     #
 ################################################################################
-CXXFLAGS=-g -DUSE_DEBUG=1 #-fPIC
+CXXFLAGS=-g #-DUSE_DEBUG=3 #-fPIC
 
 LIB_OBJS=args.o obj.o mem.o core.o instruction.o enc.o util.o lex.yy.o
 
@@ -24,13 +24,15 @@ enc.o : enc.cpp include/types.h include/util.h include/enc.h include/archdef.h\
 harptool.o : harptool.cpp include/types.h include/core.h include/enc.h \
              include/instruction.h include/mem.h include/obj.h \
              include/archdef.h include/args.h include/help.h
-instruction.o : instruction.cpp include/instruction.h include/obj.h
+instruction.o : instruction.cpp include/instruction.h include/obj.h \
+                include/core.h
 obj.o : obj.cpp include/types.h include/obj.h include/util.h \
         include/asm-tokens.h include/debug.h
 util.o : util.cpp include/types.h include/util.h
-mem.o : mem.cpp include/types.h include/util.h include/mem.h include/debug.h
+mem.o : mem.cpp include/types.h include/util.h include/mem.h include/debug.h \
+        include/core.h
 core.o : core.cpp include/types.h include/util.h include/mem.h \
-         include/debug.h include/archdef.h
+         include/debug.h include/archdef.h include/core.h
 
 QSIM_CXXFLAGS=-DEMU_INSTRUMENTATION
 

src/core.cpp

@@ -116,15 +116,21 @@ void Core::step() {
   #ifdef USE_DEBUG
   if (USE_DEBUG >= 3) {
     D(3, "Register state:");
-    for (unsigned i = 0; i < reg[0].size(); ++i)
+    for (unsigned i = 0; i < reg[0].size(); ++i) {
-      D_RAW("  %r" << i << ": " << hex << reg[0][i]
+      D_RAW("  %r" << i << ':');
-                   << '(' << shadowReg[i] << ')' << endl);
+      for (unsigned j = 0; j < reg.size(); ++j) 
+        D_RAW(' ' << hex << reg[j][i] << ' ');
+      D_RAW('(' << shadowReg[i] << ')' << endl);
+    }
     D(3, "Predicate state:");
     D_RAW("  ");
-    for (unsigned i = 0; i < pred[0].size(); ++i) D_RAW(pred[0][i]);
+    for (unsigned j = 0; j < pred.size(); ++j) {
-    D_RAW(endl << " (");
+      for (unsigned i = 0; i < pred[j].size(); ++i) D_RAW(pred[0][i]);
+      D_RAW(endl);
+    }
+    D_RAW(" (");
     for (unsigned i = 0; i < shadowPReg.size(); ++i) D_RAW(shadowPReg[i]);
-    D_RAW(endl);
+    D_RAW(')' << endl);
   }
   #endif
 

src/include/archdef.h

@@ -4,7 +4,6 @@
 #ifndef __ARCHDEF_H
 #define __ARCHDEF_H
 
-#include <iostream>
 #include <string>
 #include <sstream>
 
@@ -16,7 +15,6 @@ namespace Harp {
     struct Undefined {};
 
     ArchDef(const std::string &s) {
-      std::cout << "New archdef for \"" << s << "\"\n";
       std::istringstream iss(s.c_str());
       
       iss >> wordSize;
@@ -31,8 +29,6 @@ namespace Harp {
       iss >> sep >> nThds;
       if (!iss || sep != '/') { extent = EXT_PREGS; return; }
       extent = EXT_THDS;
-
-      std::cout << nRegs << " regs, " << nPRegs << " pred regs.\n";
     }
 
     operator std::string () const {

src/include/core.h

@@ -24,8 +24,14 @@ namespace Harp {
     Reg(Word c, Word n): cpuId(c), regNum(n), val(0) {}
 
     Reg &operator=(T r) { val = r; doWrite(); return *this; }
+
     operator T() { doRead(); return val; }
 
+    void trunc(Size s) {
+      Word mask((~0ull >> (sizeof(Word)-s)*8));
+      val &= mask;
+    }
+
   private:
     Word cpuId, regNum;
     T val;

src/instruction.cpp

@@ -145,15 +145,19 @@ void Instruction::executeOn(Core &c) {
       case TLBFLUSH: c.mem.tlbFlush();
                      break;
       case ADD: reg[rdest] = reg[rsrc[0]] + reg[rsrc[1]];
+                reg[rdest].trunc(wordSz);
                 break;
       case SUB: reg[rdest] = reg[rsrc[0]] - reg[rsrc[1]];
+                reg[rdest].trunc(wordSz);
                 break;
       case MUL: reg[rdest] = reg[rsrc[0]] + reg[rsrc[1]];
+                reg[rdest].trunc(wordSz);
                 break;
       case DIV: if (reg[rsrc[1]] == 0) throw DomainException();
                 reg[rdest] = reg[rsrc[0]] / reg[rsrc[1]];
                 break;
       case SHL: reg[rdest] = reg[rsrc[0]] << reg[rsrc[1]];
+                reg[rdest].trunc(wordSz);
                 break;
       case MOD: if (reg[rsrc[1]] == 0) throw DomainException();
                 reg[rdest] = reg[rsrc[0]] % reg[rsrc[1]];
@@ -161,12 +165,16 @@ void Instruction::executeOn(Core &c) {
       case AND: reg[rdest] = reg[rsrc[0]] & reg[rsrc[1]];
                 break;
       case NEG: reg[rdest] = -(Word_s)reg[rsrc[0]];
+                reg[rdest].trunc(wordSz);
                 break;
       case ADDI: reg[rdest] = reg[rsrc[0]] + immsrc;
+                 reg[rdest].trunc(wordSz);
                  break;
       case SUBI: reg[rdest] = reg[rsrc[0]] - immsrc;
+                 reg[rdest].trunc(wordSz);
                  break;
       case MULI: reg[rdest] = reg[rsrc[0]] * immsrc;
+                 reg[rdest].trunc(wordSz);
                  break;
       case DIVI: if (immsrc == 0) throw DomainException();
                  reg[rdest] = reg[rsrc[0]] / immsrc;
@@ -177,6 +185,7 @@ void Instruction::executeOn(Core &c) {
       case SHRI: reg[rdest] = reg[rsrc[0]] >> immsrc;
                  break;
       case SHLI: reg[rdest] = reg[rsrc[0]] << immsrc;
+                 reg[rdest].trunc(wordSz);
                  break;
       case ANDI: reg[rdest] = reg[rsrc[0]] & immsrc;
                  break;
@@ -211,6 +220,7 @@ void Instruction::executeOn(Core &c) {
 #endif
                break;
       case LDI: reg[rdest] = immsrc;
+                reg[rdest].trunc(wordSz);
                 break;
       case RTOP: pReg[pdest] = reg[rsrc[0]];
                  break;
@@ -242,6 +252,7 @@ void Instruction::executeOn(Core &c) {
       case ITOF: reg[rdest] = Float(double(reg[rsrc[0]]), wordSz);
                  break; 
       case FTOI: reg[rdest] = Word_s(double(Float(reg[rsrc[0]], wordSz)));
+                 reg[rdest].trunc(wordSz);
                  break;
       case FNEG: reg[rdest] = Float(-double(Float(reg[rsrc[0]],wordSz)),wordSz);
                  break;

src/obj.cpp

@@ -46,6 +46,7 @@ static uint64_t readParenExpression(const string &s, const map<string, Word> &d,
 {
   uint64_t (* const rPE)(const string&, const map<string, Word>&, int, int) 
     = readParenExpression;
+  if (end == start) return 0;
 
   if (end==-1) end = s.length();
   
@@ -75,6 +76,9 @@ static uint64_t readParenExpression(const string &s, const map<string, Word> &d,
     if (s[i] == '&') return rPE(s, d, start, i) & rPE(s, d, i+1, end);
   } 
 
+  // Unary -
+  if (s[start] == '-') return -rPE(s, d, start+1, end);
+
   if (isdigit(s[start])) {
     unsigned long long u;
     sscanf(s.substr(start, end-start).c_str(), "%lli", &u);
@@ -86,7 +90,7 @@ static uint64_t readParenExpression(const string &s, const map<string, Word> &d,
   map<string, Word>::const_iterator it = d.find(s.substr(start, end-start));
   if (it != d.end()) return it->second;
 
-  cout << "TODO: Error message.\n";
+  cout << "Error on " << yyline << ": ";
   exit(1);
 }
 

src/test/2thread.s

@@ -24,16 +24,13 @@ sumArr: ldi %r3, #0;
         ldi %r4, #8;
 loop:   ld  %r2, %r1, #0;
         add %r3, %r3, %r2;
-        addi %r1, %r1, #8;
+        addi %r1, %r1, __WORD;
         subi %r4, %r4, #1;
         rtop @p0, %r4;
   @p0 ? jmpi loop;
-        st %r3, %r1, #-64;
+        st %r3, %r1, (-__WORD*8)
         jmprt %r5;
 
 .perm rw
-Array1:
+Array1:  .word -1 -2 -3 -4 -5 -6 -7 -8
-.word -1 -2 -3 -4 -5 -6 -7 -8
+Array2:  .word  1  2  3  4  5  6  7  8
-
-Array2:
-.word  1  2  3  4  5  6  7  8