Fix issues quartus synthesis issues

2020-02-18 13:24:18 -05:00
parent d71f8fcc73
commit e76d05f7ce
6 changed files with 15 additions and 10 deletions
--- a/rtl/quartus/vortex.sdc
+++ b/rtl/quartus/vortex.sdc
@@ -4,3 +4,6 @@ create_clock -name {clk} -period "400 MHz" -waveform { 0.0 1.0 } [get_ports {clk

 derive_pll_clocks -create_base_clocks
 derive_clock_uncertainty
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+
+