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using 44-bit perf counters - aligned with DSP counters width

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This commit is contained in:
Blaise Tine
2021-02-28 02:05:47 -08:00
parent 9fda618815
commit e64996946d
9 changed files with 111 additions and 107 deletions
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16
hw/rtl/interfaces/VX_perf_cache_if.v
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@@ -5,14 +5,14 @@
interface VX_perf_cache_if ();
wire [63:0] reads;
wire [63:0] writes;
wire [63:0] read_misses;
wire [63:0] write_misses;
wire [63:0] bank_stalls;
wire [63:0] mshr_stalls;
wire [63:0] pipe_stalls;
wire [63:0] crsp_stalls;
wire [43:0] reads;
wire [43:0] writes;
wire [43:0] read_misses;
wire [43:0] write_misses;
wire [43:0] bank_stalls;
wire [43:0] mshr_stalls;
wire [43:0] pipe_stalls;
wire [43:0] crsp_stalls;
endinterface

38
hw/rtl/interfaces/VX_perf_memsys_if.v
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@@ -5,28 +5,28 @@
interface VX_perf_memsys_if ();
wire [63:0] icache_reads;
wire [63:0] icache_read_misses;
wire [63:0] icache_pipe_stalls;
wire [63:0] icache_crsp_stalls;
wire [43:0] icache_reads;
wire [43:0] icache_read_misses;
wire [43:0] icache_pipe_stalls;
wire [43:0] icache_crsp_stalls;
wire [63:0] dcache_reads;
wire [63:0] dcache_writes;
wire [63:0] dcache_read_misses;
wire [63:0] dcache_write_misses;
wire [63:0] dcache_bank_stalls;
wire [63:0] dcache_mshr_stalls;
wire [63:0] dcache_pipe_stalls;
wire [63:0] dcache_crsp_stalls;
wire [43:0] dcache_reads;
wire [43:0] dcache_writes;
wire [43:0] dcache_read_misses;
wire [43:0] dcache_write_misses;
wire [43:0] dcache_bank_stalls;
wire [43:0] dcache_mshr_stalls;
wire [43:0] dcache_pipe_stalls;
wire [43:0] dcache_crsp_stalls;
wire [63:0] smem_reads;
wire [63:0] smem_writes;
wire [63:0] smem_bank_stalls;
wire [43:0] smem_reads;
wire [43:0] smem_writes;
wire [43:0] smem_bank_stalls;
wire [63:0] dram_reads;
wire [63:0] dram_writes;
wire [63:0] dram_stalls;
wire [63:0] dram_latency;
wire [43:0] dram_reads;
wire [43:0] dram_writes;
wire [43:0] dram_stalls;
wire [43:0] dram_latency;
endinterface

14
hw/rtl/interfaces/VX_perf_pipeline_if.v
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@@ -4,14 +4,14 @@
`include "VX_define.vh"
interface VX_perf_pipeline_if ();
wire [63:0] ibf_stalls;
wire [63:0] scb_stalls;
wire [63:0] lsu_stalls;
wire [63:0] csr_stalls;
wire [63:0] alu_stalls;
wire [63:0] gpu_stalls;
wire [43:0] ibf_stalls;
wire [43:0] scb_stalls;
wire [43:0] lsu_stalls;
wire [43:0] csr_stalls;
wire [43:0] alu_stalls;
wire [43:0] gpu_stalls;
`ifdef EXT_F_ENABLE
wire [63:0] fpu_stalls;
wire [43:0] fpu_stalls;
`endif
endinterface