Fixed Stall Pipeline Logic

2020-03-09 22:08:46 -07:00
parent 469334f23e
commit dea271eb6b
5 changed files with 88 additions and 8 deletions
--- a/rtl/Vortex_SOC.v
+++ b/rtl/Vortex_SOC.v
@@ -216,6 +216,7 @@ module Vortex_SOC (
        .DWBQ_SIZE                    (`LLDWBQ_SIZE),
        .DFQQ_SIZE                    (`LLDFQQ_SIZE),
        .LLVQ_SIZE                    (`LLLLVQ_SIZE),
+        .FFSQ_SIZE                    (`LLFFSQ_SIZE),
        .FILL_INVALIDAOR_SIZE         (`LLFILL_INVALIDAOR_SIZE),
        .SIMULATED_DRAM_LATENCY_CYCLES(`LLSIMULATED_DRAM_LATENCY_CYCLES)
        )