move opae to /hw/syn/

hw/syn/opae/Makefile

@@ -1,6 +1,6 @@
 ASE_BUILD_DIR=build_ase
 FPGA_BUILD_DIR=build_fpga
-RTL_DIR=../rtl
+RTL_DIR=../../rtl
 
 ifeq (, $(shell which qsub-synth))
 	RUN_SYNTH=$(OPAE_PLATFORM_ROOT)/bin/run.sh > build.log 2>&1 &

hw/syn/opae/README

@@ -60,10 +60,10 @@ qsub-sim
 make ase
 
 # tests
-./run_ase.sh build_ase_1c ../../driver/tests/basic/basic -n16
+./run_ase.sh build_ase_1c ../../../driver/tests/basic/basic -n16
-./run_ase.sh build_ase_1c ../../driver/tests/demo/demo -n16
+./run_ase.sh build_ase_1c ../../../driver/tests/demo/demo -n16
-./run_ase.sh build_ase_1c ../../driver/tests/dogfood/dogfood -n16
+./run_ase.sh build_ase_1c ../../../driver/tests/dogfood/dogfood -n16
-./run_ase.sh build_ase_1c ../../benchmarks/opencl/vecadd/vecadd
+./run_ase.sh build_ase_1c ../../../benchmarks/opencl/vecadd/vecadd
 
 # modify "vsim_run.tcl" to dump VCD trace
 vcd file trace.vcd

hw/syn/opae/gen_sources.sh

@@ -1,6 +1,6 @@
 #!/bin/bash
 
-rtl_dir="../rtl"
+rtl_dir="../../rtl"
 exclude_list="VX_fpu_fpnew.v"
 file_list=""
 

hw/syn/opae/run_ase.sh

@@ -7,8 +7,8 @@ BUILD_DIR=$1
 PROGRAM=$(basename "$2")
 PROGRAM_DIR=`dirname $2`
 
-POCL_RT_PATH=$SCRIPT_DIR/../../benchmarks/opencl/runtime/lib
+POCL_RT_PATH=$SCRIPT_DIR/../../../benchmarks/opencl/runtime/lib
-VORTEX_DRV_PATH=$SCRIPT_DIR/../../driver/opae/ase
+VORTEX_DRV_PATH=$SCRIPT_DIR/../../../driver/opae/ase
 
 # Export ASE_WORKDIR variable
 export ASE_WORKDIR=$SCRIPT_DIR/$BUILD_DIR/work