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added debug print states or rtl

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This commit is contained in:
Blaise Tine
2020-05-16 14:19:17 -04:00
parent 65c2da76cf
commit d6c87dbb0a
24 changed files with 7100 additions and 5980 deletions
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4
hw/rtl/cache/VX_cache_config.vh vendored
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@@ -70,6 +70,8 @@
`define DRAM_TO_LINE_ADDR(x) x[`DRAM_ADDR_WIDTH-1:`BANK_SELECT_BITS]
`define LINE_TO_DRAM_ADDR(x, i) {x, (`BANK_SELECT_BITS)'(i)};
`define LINE_TO_DRAM_ADDR(x, i) {x, `BANK_SELECT_BITS'(i)}
`define LINE_TO_BYTE_ADDR(x, i) {x, `BANK_SELECT_BITS'(i), `BASE_ADDR_BITS'(0)}
`endif