Vortex 2.0 changes:
+ Microarchitecture optimizations + 64-bit support + Xilinx FPGA support + LLVM-16 support + Refactoring and quality control fixes
This commit is contained in:
Blaise Tine
145
hw/syn/altera/analyze_timing.tcl
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145
hw/syn/altera/analyze_timing.tcl
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# Copyright © 2019-2023
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#
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# Licensed under the Apache License, Version 2.0 (the "License");
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# you may not use this file except in compliance with the License.
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# You may obtain a copy of the License at
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# http://www.apache.org/licenses/LICENSE-2.0
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#
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# Unless required by applicable law or agreed to in writing, software
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# distributed under the License is distributed on an "AS IS" BASIS,
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# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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# See the License for the specific language governing permissions and
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# limitations under the License.
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set ProjectName [lindex $argv 0]
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set SynMode [lindex $argv 1]
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if { $SynMode == "map" } {
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set FileSuffix "map"
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} else {
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set FileSuffix "fit"
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}
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proc do_timing_checks { ProjectName FileSuffix } {
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# Validate timing DRC rules
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# REF: http://quartushelp.altera.com/14.0/mergedProjects/tafs/tafs/tcl_pkg_sta_ver_1.0_cmd_check_timing.htm
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check_timing -include {no_clock multiple_clock loops latches } -file $ProjectName.$FileSuffix.timing.check_errors.html
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# NOTE: metastability requires QSF setting of Synchronizer Identification = Auto
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# can also embed in Verilog: (* altera_attribute = "-name SYNCHRONIZER_IDENTIFICATION FORCED_IF_ASYNCHRONOUS" *)
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report_metastability -nchains 100 -file $ProjectName.$FileSuffix.timing.check_metastability.html
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}
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proc do_timing_detailed_slackpaths { ProjectName FileSuffix SynMode } {
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# Detailed info for top 100 setup/hold paths
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if { $SynMode == "fit" } {
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set npaths_detailed 200
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set npaths_pairs 10000
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set npaths_maxslack 0.2
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# Create html reports showing details of each of the top 100 paths (creates html index + subdir with css/images/etc)
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set ExtraRTArgs "-show_routing"
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report_timing -setup -nworst $npaths_detailed -detail full_path $ExtraRTArgs -file $ProjectName.$FileSuffix.timing.setup.html
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report_timing -hold -nworst $npaths_detailed -detail full_path $ExtraRTArgs -file $ProjectName.$FileSuffix.timing.hold.html
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report_timing -recovery -nworst $npaths_detailed -detail full_path $ExtraRTArgs -file $ProjectName.$FileSuffix.timing.recovery.html
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report_timing -removal -nworst $npaths_detailed -detail full_path $ExtraRTArgs -file $ProjectName.$FileSuffix.timing.removal.html
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# Create txt with (slack,src,dst) for cross-seed comparisons
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report_timing -setup -nworst $npaths_pairs -less_than_slack $npaths_maxslack -detail summary -pairs_only -file $ProjectName.$FileSuffix.timing_paths.setup.txt
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report_timing -hold -nworst $npaths_pairs -less_than_slack $npaths_maxslack -detail summary -pairs_only -file $ProjectName.$FileSuffix.timing_paths.hold.txt
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report_timing -recovery -nworst $npaths_pairs -less_than_slack $npaths_maxslack -detail summary -pairs_only -file $ProjectName.$FileSuffix.timing_paths.recovery.txt
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report_timing -removal -nworst $npaths_pairs -less_than_slack $npaths_maxslack -detail summary -pairs_only -file $ProjectName.$FileSuffix.timing_paths.removal.txt
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# Histogram of setup/hold slacks across all clocks
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set allclocks [get_clocks]
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foreach_in_collection curclk $allclocks {
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set clkname [ get_clock_info -name $curclk ]
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create_slack_histogram -clock_name $clkname -setup -file $ProjectName.$FileSuffix.timing_histogram.$clkname.setup.html
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#create_slack_histogram -clock_name $clkname -hold -file $ProjectName.$FileSuffix.timing_histogram.$clkname.hold.html
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}
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# Just emit simple setup paths if analyzing MAP netlist
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} else {
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set ExtraRTArgs ""
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report_timing -setup -nworst 100 -detail full_path $ExtraRTArgs -file $ProjectName.$FileSuffix.timing.setup.html
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}
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}
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proc do_timing_summary { ProjectName FileSuffix } {
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# Save summary into to single txt file
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create_timing_summary -setup -file $ProjectName.$FileSuffix.timing.summary.txt
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create_timing_summary -hold -append -file $ProjectName.$FileSuffix.timing.summary.txt
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report_clocks -summary -append -file $ProjectName.$FileSuffix.timing.summary.txt
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report_clock_fmax_summary -append -file $ProjectName.$FileSuffix.timing.summary.txt
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}
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proc do_timing_detailed_bottleneck_paths { ProjectName FileSuffix } {
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# Create bottleneck timing analysis with different metrics to analyze setup paths
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#proc custom_metric_fanins {arg} {
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# upvar $arg metric
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# set rating $metric(num_fanins)
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# return $rating
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#}
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#report_bottleneck -cmetric custom_metric_fanins -file timing.bottlneck.num_fanins.html $tpaths
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set tpaths [ get_timing_paths -nworst 1000 -setup ]
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set tns_paths [ report_bottleneck -metric tns $tpaths -stdout ]
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set np_paths [ report_bottleneck -metric num_paths $tpaths -stdout ]
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set nfp_paths [ report_bottleneck -metric num_fpaths $tpaths -stdout ]
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set nfo_paths [ report_bottleneck -metric num_fanouts $tpaths -stdout ]
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set nfi_paths [ report_bottleneck -metric num_fanins $tpaths -stdout ]
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set fo [ open "$ProjectName.$FileSuffix.timing.setup.bottlenecks.txt" "w" ]
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puts $fo "Bottlenecks by TNS"
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puts $fo $tns_paths
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puts $fo "Bottlenecks by NumPaths"
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puts $fo $np_paths
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puts $fo "Bottlenecks by NumFailingPaths"
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puts $fo $nfp_paths
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puts $fo "Bottlenecks by NumFanOuts"
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puts $fo $nfo_paths
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puts $fo "Bottlenecks by NumFanIns"
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puts $fo $nfi_paths
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}
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# Iterate over all known operating conditions
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# 3_H2_slow_850mv_100c / 3_H2_slow_850mv_100c / 3_H2_slow_850mv_0c / MIN_fast_850mv_100c / MIN_fast_850mv_0c
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#foreach_in_collection oc [get_available_operating_conditions] {
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# set_operating_conditions $oc
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# post_message "Setting Operating Conditions $oc"
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# update_timing_netlist
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# report_timing -setup -npaths 100 -file $ProjectName.timing.setup.html
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# report_timing -hold -npaths 100 -file $ProjectName.timing.hold.html
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#}
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project_open $ProjectName
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# => allows comparison of raw logic vs impact of routing delays
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if { $SynMode == "map" } {
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create_timing_netlist -post_map
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read_sdc
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update_timing_netlist
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do_timing_detailed_slackpaths $ProjectName $FileSuffix $SynMode
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do_timing_summary $ProjectName $FileSuffix
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delete_timing_netlist
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# normal post-par analysis (includes routing congestion/physical placement constraints)
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} else {
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create_timing_netlist
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read_sdc
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update_timing_netlist
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# Iterate over a single worst-case operating condition (grade/speed pre-selected based on netlist)
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set_operating_conditions -voltage 900 -temperature 100
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update_timing_netlist
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do_timing_checks $ProjectName $FileSuffix
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do_timing_detailed_slackpaths $ProjectName $FileSuffix $SynMode
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do_timing_detailed_bottleneck_paths $ProjectName $FileSuffix
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do_timing_summary $ProjectName $FileSuffix
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delete_timing_netlist
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}
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project_close
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