memory interface refactoring

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Blaise Tine

2021-07-20 21:06:55 -07:00

parent 80cf1f26f9

commit d3b788784a

14 changed files with 144 additions and 144 deletions

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hw/rtl/interfaces/VX_dcache_core_req_if.v → hw/rtl/interfaces/VX_dcache_req_if.v

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hw/rtl/interfaces/VX_dcache_core_rsp_if.v → hw/rtl/interfaces/VX_dcache_rsp_if.v

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hw/rtl/interfaces/VX_icache_core_req_if.v → hw/rtl/interfaces/VX_icache_req_if.v

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hw/rtl/interfaces/VX_icache_core_rsp_if.v → hw/rtl/interfaces/VX_icache_rsp_if.v

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hw/rtl/interfaces/VX_cache_mem_req_if.v → hw/rtl/interfaces/VX_mem_req_if.v

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hw/rtl/interfaces/VX_cache_mem_rsp_if.v → hw/rtl/interfaces/VX_mem_rsp_if.v