round robin arbiter + auto buffered queue + fixed dcache arbiter
This commit is contained in:
15
hw/rtl/cache/VX_cache_dram_req_arb.v
vendored
15
hw/rtl/cache/VX_cache_dram_req_arb.v
vendored
@@ -74,11 +74,11 @@ module VX_cache_dram_req_arb #(
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wire dfqq_push = (| per_bank_dram_fill_req_valid);
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wire dfqq_full;
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VX_cache_dfq_queue #(
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VX_cache_dram_fill_arb #(
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.BANK_LINE_SIZE(BANK_LINE_SIZE),
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.NUM_BANKS(NUM_BANKS),
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.DFQQ_SIZE(DFQQ_SIZE)
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) cache_dfq_queue (
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) dram_fill_arb (
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.clk (clk),
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.reset (reset),
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.dfqq_push (dfqq_push),
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@@ -95,12 +95,15 @@ module VX_cache_dram_req_arb #(
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wire [`BANK_BITS-1:0] dwb_bank;
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VX_generic_priority_encoder #(
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VX_fixed_arbiter #(
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.N(NUM_BANKS)
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) sel_dwb (
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.valids(per_bank_dram_wb_req_valid),
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.index (dwb_bank),
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.found (dwb_valid)
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.clk (clk),
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.reset (reset),
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.requests (per_bank_dram_wb_req_valid),
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.grant_index (dwb_bank),
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.grant_valid (dwb_valid),
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`UNUSED_PIN (grant_onehot)
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);
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genvar i;
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