adding input buffering to bus arbiters to reduce backpressure delay propagation

This commit is contained in:
Blaise Tine
2020-12-05 17:31:29 -08:00
parent 13a5370254
commit d0f2a3984d
17 changed files with 480 additions and 338 deletions

View File

@@ -6,9 +6,9 @@ module VX_rr_arbiter #(
parameter LOG_NUM_REQS = $clog2(NUM_REQS)
) (
input wire clk,
input wire reset,
input wire [NUM_REQS-1:0] requests,
input wire reset,
input wire enable,
input wire [NUM_REQS-1:0] requests,
output wire [LOG_NUM_REQS-1:0] grant_index,
output wire [NUM_REQS-1:0] grant_onehot,
output wire grant_valid