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minor update

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This commit is contained in:
Blaise Tine
2020-05-21 13:42:08 -04:00
parent d12c40131e
commit cf22ef2bf3
16 changed files with 82 additions and 92 deletions
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4
driver/rtlsim/Makefile
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@@ -30,6 +30,7 @@ SRCS = vortex.cpp ../common/vx_utils.cpp ../../hw/simulate/simulator.cpp
RTL_INCLUDE = -I../../hw/rtl -I../../hw/rtl/libs -I../../hw/rtl/interfaces -I../../hw/rtl/pipe_regs -I../../hw/rtl/cache
VL_FLAGS += --language 1800-2009 --assert -Wall -Wpedantic $(MULTICORE)
VL_FLAGS += -Wno-DECLFILENAME
# Use 64 bytes DRAM blocks
CFLAGS += -DGLOBAL_BLOCK_SIZE=64
@@ -37,6 +38,9 @@ VL_FLAGS += -DGLOBAL_BLOCK_SIZE=64
VL_FLAGS += --x-initial unique
VL_FLAGS += -DDPRFQ_SIZE=0 -DIPRFQ_SIZE=0 -DSPRFQ_SIZE=0 -DL2PRFQ_SIZE=0 -DL3PRFQ_SIZE=0
VL_FLAGS += -DDFILL_INVALIDAOR_SIZE=0 -DIFILL_INVALIDAOR_SIZE=0 -DSFILL_INVALIDAOR_SIZE=0 -DL2FILL_INVALIDAOR_SIZE=0 -DL3FILL_INVALIDAOR_SIZE=0
# Enable Verilator multithreaded simulation
#THREADS ?= $(shell python3 -c 'import multiprocessing as mp; print(max(1, mp.cpu_count() // 2))')
#VL_FLAGS += --threads $(THREADS)