better use of valid signal

2019-03-27 00:07:59 -04:00
parent 7a528c5ef2
commit cc0fb0eece
23 changed files with 171 additions and 160 deletions
--- a/rtl/VX_decode.v
+++ b/rtl/VX_decode.v
@@ -11,6 +11,7 @@ module VX_decode(
 	input wire[31:0]  in_write_data,
 	input wire[4:0]   in_rd,
 	input wire[1:0]   in_wb,
+	input wire        in_wb_valid,

 	// FORWARDING INPUTS
 	input wire        in_src1_fwd,
@@ -106,6 +107,7 @@ module VX_decode(

 		VX_register_file vx_register_file(
 			.clk(clk),
+			.in_valid(in_wb_valid),
 			.in_write_register(write_register),
 			.in_rd(in_rd),
 			.in_data(in_write_data),