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OUTPUT_REG => OUT_REG renaming

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Blaise Tine
2021-09-09 03:05:38 -07:00
parent a25076b9c1
commit ca46b0a0be
14 changed files with 62 additions and 62 deletions
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14
hw/rtl/libs/VX_elastic_buffer.v
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@@ -4,7 +4,7 @@
module VX_elastic_buffer #(
parameter DATAW = 1,
parameter SIZE = 2,
parameter OUTPUT_REG = 0,
parameter OUT_REG = 0,
parameter LUTRAM = 0
) (
input wire clk,
@@ -32,8 +32,8 @@ module VX_elastic_buffer #(
end else if (SIZE == 2) begin
VX_skid_buffer #(
.DATAW (DATAW),
.OUTPUT_REG (OUTPUT_REG)
.DATAW (DATAW),
.OUT_REG (OUT_REG)
) queue (
.clk (clk),
.reset (reset),
@@ -53,10 +53,10 @@ module VX_elastic_buffer #(
wire pop = valid_out && ready_out;
VX_fifo_queue #(
.DATAW (DATAW),
.SIZE (SIZE),
.OUTPUT_REG (OUTPUT_REG),
.LUTRAM (LUTRAM)
.DATAW (DATAW),
.SIZE (SIZE),
.OUT_REG (OUT_REG),
.LUTRAM (LUTRAM)
) queue (
.clk (clk),
.reset (reset),