1 WARP 2 THREADS WORKING

rtl/VX_register_file.v

@@ -9,8 +9,9 @@ module VX_register_file (
   input wire[4:0]   in_src1,
   input wire[4:0]   in_src2,
 
-  output reg[31:0] out_src1_data,
-  output reg[31:0] out_src2_data
+  output wire[31:0]  out_regs[31:0],
+  output reg[31:0]   out_src1_data,
+  output reg[31:0]   out_src2_data
 );
 
 	reg[31:0] registers[31:0];
@@ -28,6 +29,8 @@ module VX_register_file (
 	// 	end
 	// end
 
+	assign out_regs = registers;
+
 	assign write_data     = in_data;
 	assign write_register = in_rd;