replace procedural continuous assignments and force MLAB inference for generic_queue_ll

rtl/VX_cache/VX_cache_req_queue.v

@@ -166,9 +166,9 @@ module VX_cache_req_queue
 
 
 	always @(*) begin
-		assign updated_valids = qual_valids;
+		updated_valids = qual_valids;
 		if (qual_has_request) begin
-			assign updated_valids[qual_request_index] = 0;
+			updated_valids[qual_request_index] = 0;
 		end
 	end
 

rtl/VX_cache/VX_snp_fwd_arb.v

@@ -30,7 +30,7 @@ module VX_snp_fwd_arb
 	assign snp_fwd_addr  = per_bank_snp_fwd_addr[fsq_bank];
 
 	always @(*) begin
-		assign per_bank_snp_fwd_pop = 0;
+		per_bank_snp_fwd_pop = 0;
 		if (fsq_valid) begin
 			per_bank_snp_fwd_pop[fsq_bank] = 1;
 		end