snooping response handling
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@@ -8,7 +8,7 @@ module Vortex #(
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input wire clk,
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input wire reset,
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// DRAM Dcache Req
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// DRAM Dcache request
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output wire D_dram_req_read,
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output wire D_dram_req_write,
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output wire [`DDRAM_ADDR_WIDTH-1:0] D_dram_req_addr,
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@@ -16,13 +16,13 @@ module Vortex #(
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output wire [`DDRAM_TAG_WIDTH-1:0] D_dram_req_tag,
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input wire D_dram_req_ready,
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// DRAM Dcache Rsp
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// DRAM Dcache reponse
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input wire D_dram_rsp_valid,
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input wire [`DDRAM_LINE_WIDTH-1:0] D_dram_rsp_data,
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input wire [`DDRAM_TAG_WIDTH-1:0] D_dram_rsp_tag,
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output wire D_dram_rsp_ready,
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// DRAM Icache Req
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// DRAM Icache request
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output wire I_dram_req_read,
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output wire I_dram_req_write,
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output wire [`IDRAM_ADDR_WIDTH-1:0] I_dram_req_addr,
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@@ -30,17 +30,22 @@ module Vortex #(
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output wire [`IDRAM_TAG_WIDTH-1:0] I_dram_req_tag,
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input wire I_dram_req_ready,
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// DRAM Icache Rsp
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// DRAM Icache response
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input wire I_dram_rsp_valid,
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input wire [`IDRAM_LINE_WIDTH-1:0] I_dram_rsp_data,
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input wire [`IDRAM_TAG_WIDTH-1:0] I_dram_rsp_tag,
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output wire I_dram_rsp_ready,
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// Cache Snooping
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// Snoop request
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input wire snp_req_valid,
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input wire [`DDRAM_ADDR_WIDTH-1:0] snp_req_addr,
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input wire [`DSNP_TAG_WIDTH-1:0] snp_req_tag,
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output wire snp_req_ready,
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output wire snp_rsp_valid,
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output wire [`DSNP_TAG_WIDTH-1:0] snp_rsp_tag,
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input wire snp_rsp_ready,
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// I/O request
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output wire io_req_read,
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output wire io_req_write,
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@@ -172,12 +177,24 @@ module Vortex #(
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VX_warp_ctl_if warp_ctl_if();
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// Cache snooping
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VX_cache_snp_req_if #(.DRAM_ADDR_WIDTH(`DDRAM_ADDR_WIDTH)) dcache_snp_req_if();
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VX_cache_snp_req_if #(
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.DRAM_ADDR_WIDTH(`DDRAM_ADDR_WIDTH),
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.SNP_TAG_WIDTH(`DSNP_TAG_WIDTH)
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) dcache_snp_req_if();
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VX_cache_snp_rsp_if #(
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.SNP_TAG_WIDTH(`DSNP_TAG_WIDTH)
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) dcache_snp_rsp_if();
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assign dcache_snp_req_if.snp_req_valid = snp_req_valid;
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assign dcache_snp_req_if.snp_req_addr = snp_req_addr;
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assign dcache_snp_req_if.snp_req_tag = snp_req_tag;
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assign snp_req_ready = dcache_snp_req_if.snp_req_ready;
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assign snp_rsp_valid = dcache_snp_rsp_if.snp_rsp_valid;
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assign snp_rsp_tag = dcache_snp_rsp_if.snp_rsp_tag;
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assign dcache_snp_rsp_if.snp_rsp_ready = snp_rsp_ready;
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VX_front_end #(
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.CORE_ID(CORE_ID)
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) front_end (
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@@ -236,6 +253,7 @@ module Vortex #(
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.dcache_dram_req_if (dcache_dram_req_if),
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.dcache_dram_rsp_if (dcache_dram_rsp_if),
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.dcache_snp_req_if (dcache_snp_req_if),
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.dcache_snp_rsp_if (dcache_snp_rsp_if),
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// Core <-> Icache
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.icache_core_req_if (icache_core_req_if),
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