Vortex 2.0 changes:
+ Microarchitecture optimizations + 64-bit support + Xilinx FPGA support + LLVM-16 support + Refactoring and quality control fixes minor update minor update minor update minor update minor update minor update cleanup cleanup cache bindings and memory perf refactory minor update minor update hw unit tests fixes minor update minor update minor update minor update minor update minor udpate minor update minor update minor update minor update minor update minor update minor update minor updates minor updates minor update minor update minor update minor update minor update minor update minor updates minor updates minor updates minor updates minor update minor update
This commit is contained in:
Blaise Tine
@@ -1,3 +1,16 @@
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// Copyright © 2019-2023
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#pragma once
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#include "types.h"
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@@ -7,7 +20,7 @@ namespace vortex {
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class Warp;
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enum Opcode {
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NOP = 0,
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NONE = 0,
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R_INST = 0x33,
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L_INST = 0x3,
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I_INST = 0x13,
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@@ -19,6 +32,7 @@ enum Opcode {
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JALR_INST = 0x67,
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SYS_INST = 0x73,
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FENCE = 0x0f,
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AMO = 0x2f,
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// F Extension
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FL = 0x7,
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FS = 0x27,
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@@ -26,19 +40,20 @@ enum Opcode {
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FMADD = 0x43,
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FMSUB = 0x47,
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FMNMSUB = 0x4b,
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FMNMADD = 0x4f,
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// Vector Extension
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VSET = 0x57,
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// GPGPU Extension
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GPGPU = 0x6b,
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GPU = 0x5b,
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// RV64 Standard Extensions
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FMNMADD = 0x4f,
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// RV64 Standard Extension
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R_INST_W = 0x3b,
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I_INST_W = 0x1b,
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// Vector Extension
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VSET = 0x57,
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// Custom Extensions
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EXT1 = 0x0b,
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EXT2 = 0x2b,
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EXT3 = 0x5b,
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EXT4 = 0x7b
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};
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enum InstType {
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N_TYPE,
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enum InstType {
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R_TYPE,
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I_TYPE,
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S_TYPE,
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@@ -52,25 +67,45 @@ enum InstType {
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class Instr {
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public:
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Instr()
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: opcode_(Opcode::NOP)
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: opcode_(Opcode::NONE)
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, num_rsrcs_(0)
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, has_imm_(false)
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, rdest_type_(RegType::None)
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, imm_(0)
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, rdest_(0)
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, func2_(0)
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, func3_(0)
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, func6_(0)
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, func7_(0) {
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, func7_(0)
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, vmask_(0)
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, vlsWidth_(0)
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, vMop_(0)
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, vNf_(0)
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, vs3_(0)
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, vlmul_(0)
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, vsew_(0)
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, vediv_(0) {
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for (uint32_t i = 0; i < MAX_REG_SOURCES; ++i) {
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rsrc_type_[i] = RegType::None;
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rsrc_[i] = 0;
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}
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}
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void setOpcode(Opcode opcode) { opcode_ = opcode; }
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void setDestReg(uint32_t destReg, RegType type) { rdest_type_ = type; rdest_ = destReg; }
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void setSrcReg(uint32_t srcReg, RegType type) { rsrc_type_[num_rsrcs_] = type; rsrc_[num_rsrcs_++] = srcReg; }
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void setDestVReg(uint32_t destReg) { rdest_type_ = RegType::Vector; rdest_ = destReg; }
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void setSrcVReg(uint32_t srcReg) { rsrc_type_[num_rsrcs_] = RegType::Vector; rsrc_[num_rsrcs_++] = srcReg; }
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void setDestReg(uint32_t destReg, RegType type) {
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rdest_type_ = type;
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rdest_ = destReg;
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}
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void addSrcReg(uint32_t srcReg, RegType type) {
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rsrc_type_[num_rsrcs_] = type;
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rsrc_[num_rsrcs_] = srcReg;
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++num_rsrcs_;
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}
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void setSrcReg(uint32_t index, uint32_t srcReg, RegType type) {
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rsrc_type_[index] = type;
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rsrc_[index] = srcReg;
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num_rsrcs_ = std::max<uint32_t>(num_rsrcs_, index+1);
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}
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void setFunc2(uint32_t func2) { func2_ = func2; }
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void setFunc3(uint32_t func3) { func3_ = func3; }
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void setFunc7(uint32_t func7) { func7_ = func7; }
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@@ -85,17 +120,17 @@ public:
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void setVediv(uint32_t ediv) { vediv_ = 1 << ediv; }
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void setFunc6(uint32_t func6) { func6_ = func6; }
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Opcode getOpcode() const { return opcode_; }
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Opcode getOpcode() const { return opcode_; }
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uint32_t getFunc2() const { return func2_; }
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uint32_t getFunc3() const { return func3_; }
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uint32_t getFunc6() const { return func6_; }
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uint32_t getFunc7() const { return func7_; }
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uint32_t getNRSrc() const { return num_rsrcs_; }
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uint32_t getRSrc(uint32_t i) const { return rsrc_[i]; }
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RegType getRSType(uint32_t i) const { return rsrc_type_[i]; }
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RegType getRSType(uint32_t i) const { return rsrc_type_[i]; }
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uint32_t getRDest() const { return rdest_; }
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RegType getRDType() const { return rdest_type_; }
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bool hasImm() const { return has_imm_; }
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RegType getRDType() const { return rdest_type_; }
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bool hasImm() const { return has_imm_; }
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uint32_t getImm() const { return imm_; }
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uint32_t getVlsWidth() const { return vlsWidth_; }
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uint32_t getVmop() const { return vMop_; }
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