Vortex 2.0 changes:

+ Microarchitecture optimizations
+ 64-bit support
+ Xilinx FPGA support
+ LLVM-16 support
+ Refactoring and quality control fixes

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cleanup

cleanup

cache bindings and memory perf refactory

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hw unit tests fixes

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minor udpate

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hw/syn/yosys/Makefile

@@ -1,20 +1,95 @@
-PROJECT = Vortex
-TOP_LEVEL_ENTITY = Vortex
-SRC_FILE = Vortex.sv
-RTL_DIR = ../../rtl
+TOP_LEVEL_ENTITY ?= Vortex
+PREFIX ?= build
+NUM_CORES ?= 1
+XLEN ?= 32
 
-DEFINES = -DNDEBUG -DSYNTHESIS -DEXT_F_DISABLE -DNUM_CORES=1 -DNUM_THREADS=2 -DNUM_WARPS=2 -DMEM_BLOCK_SIZE=64
+SCRIPT_DIR = ../../../scripts
+RTL_DIR = ../../../rtl
+DPI_DIR = ../../../dpi
+THIRD_PARTY_DIR = ../../../../third_party
 
-RTL_INCLUDE = -I$(RTL_DIR) -I$(RTL_DIR)/libs -I$(RTL_DIR)/interfaces -I$(RTL_DIR)/cache
+CP = cp -rf
+RMDIR = rm -rf
+ECHO = @echo
+
+BUILD_DIR = $(PREFIX)_$(TOP_LEVEL_ENTITY)
+BIN_DIR   = $(BUILD_DIR)/bin
+
+# control RTL debug tracing states
+DBG_TRACE_FLAGS += -DDBG_TRACE_CORE_PIPELINE  
+DBG_TRACE_FLAGS += -DDBG_TRACE_CORE_ICACHE
+DBG_TRACE_FLAGS += -DDBG_TRACE_CORE_DCACHE
+DBG_TRACE_FLAGS += -DDBG_TRACE_CORE_MEM
+DBG_TRACE_FLAGS += -DDBG_TRACE_CACHE_BANK
+DBG_TRACE_FLAGS += -DDBG_TRACE_CACHE_MSHR
+DBG_TRACE_FLAGS += -DDBG_TRACE_CACHE_TAG
+DBG_TRACE_FLAGS += -DDBG_TRACE_CACHE_DATA
+DBG_TRACE_FLAGS += -DDBG_TRACE_AFU
+DBG_TRACE_FLAGS += -DDBG_TRACE_GBAR
+
+# Control logic analyzer monitors
+DBG_SCOPE_FLAGS += -DDBG_SCOPE_AFU
+DBG_SCOPE_FLAGS += -DDBG_SCOPE_ISSUE
+DBG_SCOPE_FLAGS += -DDBG_SCOPE_FETCH
+DBG_SCOPE_FLAGS += -DDBG_SCOPE_LSU
+DBG_SCOPE_FLAGS += -DDBG_SCOPE_MSCHED
+
+# cluster configuration
+CONFIGS_1c  := -DNUM_CLUSTERS=1 -DNUM_CORES=1
+CONFIGS_2c  := -DNUM_CLUSTERS=1 -DNUM_CORES=2
+CONFIGS_4c  := -DNUM_CLUSTERS=1 -DNUM_CORES=4  -DL2_ENABLE
+CONFIGS_8c	:= -DNUM_CLUSTERS=1 -DNUM_CORES=8  -DL2_ENABLE
+CONFIGS_16c	:= -DNUM_CLUSTERS=1 -DNUM_CORES=16 -DL2_ENABLE
+CONFIGS_32c := -DNUM_CLUSTERS=2 -DNUM_CORES=16 -DL2_ENABLE
+CONFIGS_64c := -DNUM_CLUSTERS=4 -DNUM_CORES=16 -DL2_ENABLE
+CONFIGS += $(CONFIGS_$(NUM_CORES)c)
+
+# include paths
+FPU_INCLUDE = -I$(RTL_DIR)/fpu
+ifneq (,$(findstring FPU_FPNEW,$(CONFIGS)))
+	FPU_INCLUDE += -J$(THIRD_PARTY_DIR)/fpnew/src/common_cells/include -J$(THIRD_PARTY_DIR)/fpnew/src/common_cells/src -J$(THIRD_PARTY_DIR)/fpnew/src/fpu_div_sqrt_mvp/hdl -J$(THIRD_PARTY_DIR)/fpnew/src
+endif
+RTL_INCLUDE = -I$(RTL_DIR) -I$(RTL_DIR)/libs -I$(RTL_DIR)/interfaces -I$(RTL_DIR)/core -I$(RTL_DIR)/mem -I$(RTL_DIR)/cache
+RTL_INCLUDE += $(FPU_INCLUDE)
+
+# Debugigng
+ifdef DEBUG
+	CFLAGS += -DNDEBUG -DSCOPE $(DBG_SCOPE_FLAGS)
+	SCOPE_JSON += $(BUILD_DIR)/scope.json
+else    
+	CFLAGS += -DNDEBUG
+endif
+
+# Enable scope analyzer
+ifdef SCOPE
+	CFLAGS += -DSCOPE
+endif
+
+# Enable perf counters
+ifdef PERF
+	CFLAGS += -DPERF_ENABLE
+endif
+
+CFLAGS += -DSYNTHESIS -DYOSYS
+CFLAGS += -DXLEN_$(XLEN)
+CFLAGS += $(CONFIGS)
+CFLAGS += $(RTL_INCLUDE)
 
 # Build targets
-all: build
+all: clean build
 
-output.v:
-	./sv2v.sh $(DEFINES) $(RTL_INCLUDE) -ooutput.v
+gen-sources: $(BUILD_DIR)/sources.txt
+$(BUILD_DIR)/sources.txt:
+	mkdir -p $(BUILD_DIR); cd $(BUILD_DIR); $(SCRIPT_DIR)/gen_sources.sh -P $(CFLAGS) -Csrc -Osources.txt
 
-build: output.v	
-	./synth.sh -t$(TOP_LEVEL_ENTITY) -soutput.v
+$(BUILD_DIR)/project.v: gen-sources
+	cd $(BUILD_DIR); $(SCRIPT_DIR)/sv2v.sh -t$(TOP_LEVEL_ENTITY) -Isrc -oproject.v
+
+build: $(BUILD_DIR)/project.v
+	cd $(BUILD_DIR); ../synth.sh -t$(TOP_LEVEL_ENTITY) -sproject.v
+
+elaborate: $(BUILD_DIR)/project.v
+	cd $(BUILD_DIR); ../synth.sh -t$(TOP_LEVEL_ENTITY) -sproject.v -P="elaborate"
 
 clean:
-	rm -rf output.v *.ys *.log
+	$(RMDIR) $(BUILD_DIR)