Vortex 2.0 changes:
+ Microarchitecture optimizations + 64-bit support + Xilinx FPGA support + LLVM-16 support + Refactoring and quality control fixes minor update minor update minor update minor update minor update minor update cleanup cleanup cache bindings and memory perf refactory minor update minor update hw unit tests fixes minor update minor update minor update minor update minor update minor udpate minor update minor update minor update minor update minor update minor update minor update minor updates minor updates minor update minor update minor update minor update minor update minor update minor updates minor updates minor updates minor updates minor update minor update
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Blaise Tine
@@ -1,89 +1,68 @@
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`ifndef VX_SCOPE
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`define VX_SCOPE
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// Copyright © 2019-2023
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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`ifndef VX_SCOPE_VH
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`define VX_SCOPE_VH
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`ifdef SCOPE
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`include "scope-defs.vh"
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`define SCOPE_IO_DECL \
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input wire scope_reset, \
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input wire scope_bus_in, \
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output wire scope_bus_out,
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`define SCOPE_ASSIGN(d,s) assign scope_``d = s
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`define SCOPE_IO_SWITCH(__count) \
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wire scope_bus_in_w [__count]; \
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wire scope_bus_out_w [__count]; \
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`RESET_RELAY_EX(scope_reset_w, scope_reset, __count, 4); \
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VX_scope_switch #( \
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.N (__count) \
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) scope_switch ( \
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.clk (clk), \
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.reset (scope_reset), \
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.req_in (scope_bus_in), \
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.rsp_out (scope_bus_out), \
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.req_out (scope_bus_in_w), \
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.rsp_in (scope_bus_out_w) \
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);
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`define SCOPE_SIZE 1024
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`define SCOPE_IO_BIND(__i) \
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.scope_reset (scope_reset_w[__i]), \
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.scope_bus_in (scope_bus_in_w[__i]), \
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.scope_bus_out (scope_bus_out_w[__i]),
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`define SCOPE_IO_UNUSED() \
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`UNUSED_VAR (scope_reset); \
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`UNUSED_VAR (scope_bus_in); \
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assign scope_bus_out = 0;
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`define SCOPE_IO_UNUSED_W(__i) \
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`UNUSED_VAR (scope_reset_w[__i]); \
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`UNUSED_VAR (scope_bus_in_w[__i]); \
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assign scope_bus_out_w[__i] = 0;
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`else
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`define SCOPE_IO_VX_icache_stage
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`define SCOPE_IO_DECL
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`define SCOPE_IO_VX_fetch
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`define SCOPE_IO_SWITCH(__count)
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`define SCOPE_BIND_VX_fetch_icache_stage
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`define SCOPE_IO_BIND(__i)
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`define SCOPE_BIND_VX_fetch_warp_sched
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`define SCOPE_IO_UNUSED_W(__i)
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`define SCOPE_IO_VX_warp_sched
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`define SCOPE_IO_VX_pipeline
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`define SCOPE_BIND_VX_pipeline_fetch
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`define SCOPE_IO_VX_core
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`define SCOPE_BIND_VX_core_pipeline
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`define SCOPE_IO_VX_cluster
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`define SCOPE_BIND_VX_cluster_core(__i__)
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`define SCOPE_IO_Vortex
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`define SCOPE_BIND_Vortex_cluster(__i__)
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`define SCOPE_BIND_afu_vortex
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`define SCOPE_IO_VX_lsu_unit
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`define SCOPE_IO_VX_gpu_unit
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`define SCOPE_IO_VX_execute
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`define SCOPE_BIND_VX_execute_lsu_unit
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`define SCOPE_BIND_VX_execute_gpu_unit
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`define SCOPE_BIND_VX_pipeline_execute
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`define SCOPE_IO_VX_issue
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`define SCOPE_BIND_VX_pipeline_issue
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`define SCOPE_IO_VX_bank
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`define SCOPE_IO_VX_cache
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`define SCOPE_BIND_VX_cache_bank(__i__)
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`define SCOPE_BIND_Vortex_l3cache
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`define SCOPE_BIND_VX_cluster_l2cache
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`define SCOPE_IO_VX_mem_unit
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`define SCOPE_BIND_VX_mem_unit_dcache
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`define SCOPE_BIND_VX_core_mem_unit
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`define SCOPE_BIND_VX_mem_unit_icache
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`define SCOPE_BIND_VX_mem_unit_smem
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`define SCOPE_DECL_SIGNALS
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`define SCOPE_DATA_LIST
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`define SCOPE_UPDATE_LIST
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`define SCOPE_TRIGGER
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`define SCOPE_ASSIGN(d,s)
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`define SCOPE_IO_UNUSED(__i)
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`endif
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`endif
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`endif // VX_SCOPE_VH
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