flash: Add DMA config logic
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@@ -74,9 +74,9 @@ inline void thread_block_init_sharedmem(const uint32_t tid_in_threadblock,
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}
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}
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inline void thread_block_copy_rowmax(const float *src, float *dest,
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inline void thread_block_copy_rowmax(const float *src, float *dest,
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const uint32_t tid_in_threadblock,
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const uint32_t tid_in_threadblock,
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const uint32_t threads_per_threadblock,
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const uint32_t threads_per_threadblock,
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const uint32_t threadblock_id_in_cluster) {
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const uint32_t threadblock_id_in_cluster) {
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asm volatile("threadblock_copy_rowmax_start_%=:" ::);
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asm volatile("threadblock_copy_rowmax_start_%=:" ::);
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const uint32_t tid_in_warp = tid_in_threadblock % NUM_THREADS;
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const uint32_t tid_in_warp = tid_in_threadblock % NUM_THREADS;
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@@ -617,6 +617,26 @@ void kernel_body(int task_id, kernel_arg_t *__UNIFORM__ arg) {
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threadblock_barrier(global_barrier_id, warps_per_threadblock_per_core);
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threadblock_barrier(global_barrier_id, warps_per_threadblock_per_core);
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}
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}
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if constexpr (GEMMINI_DMA) {
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if (tid_in_threadblock == 0) {
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gemmini_extended_config_ex(WEIGHT_STATIONARY, 0, 0, 1, 0, 0);
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// gemmini_extended_config_ex(dataflow, act & 3, 0, 1, a_transpose,
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// b_transpose);
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// configure DMA for Q tile
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gemmini_extended3_config_ld(HEADDIM * sizeof(elem_t), MVIN_SCALE_IDENTITY,
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false, 0);
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// configure DMA for K tile
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gemmini_extended3_config_ld(B_COL * sizeof(elem_t), MVIN_SCALE_IDENTITY,
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false, 1);
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// configure DMA for Q*K store
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gemmini_extended_config_st(B_COL * sizeof(elem_t), 0,
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MVIN_SCALE_IDENTITY);
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gemmini_fence();
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}
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}
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// read Q and K into SMEM before the loop starts
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// read Q and K into SMEM before the loop starts
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//
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//
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static_assert(B_ROW == B_COL, "currently only supports square tiles");
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static_assert(B_ROW == B_COL, "currently only supports square tiles");
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