interfaces refactoring

This commit is contained in:
Blaise Tine
2020-07-02 20:43:52 -07:00
parent a5f4eb3d13
commit bca36e213e
12 changed files with 43 additions and 43 deletions

View File

@@ -8,7 +8,7 @@ interface VX_backend_req_if ();
wire [`NUM_THREADS-1:0] valid;
wire [`NW_BITS-1:0] warp_num;
wire [31:0] curr_PC;
wire [11:0] csr_address;
wire [11:0] csr_addr;
wire is_csr;
wire csr_immed;
wire [31:0] csr_mask;

View File

@@ -11,7 +11,7 @@ interface VX_csr_req_if ();
wire [1:0] wb;
wire [4:0] alu_op;
wire is_csr;
wire [11:0] csr_address;
wire [11:0] csr_addr;
wire csr_immed;
wire [31:0] csr_mask;

View File

@@ -38,7 +38,7 @@ interface VX_exec_unit_req_if ();
// CSR info
wire is_csr;
wire [11:0] csr_address;
wire [11:0] csr_addr;
wire csr_immed;
wire [31:0] csr_mask;

View File

@@ -10,8 +10,8 @@ interface VX_lsu_req_if ();
wire [31:0] curr_PC;
wire [`NW_BITS-1:0] warp_num;
wire [`NUM_THREADS-1:0][31:0] store_data;
wire [`NUM_THREADS-1:0][31:0] base_address; // A reg data
wire [31:0] offset; // itype_immed
wire [`NUM_THREADS-1:0][31:0] base_addr; // A reg data
wire [31:0] offset; // itype_immed
wire [`BYTE_EN_BITS-1:0] mem_read;
wire [`BYTE_EN_BITS-1:0] mem_write;
wire [4:0] rd; // dest register