OPAE rtl fixes
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19
hw/rtl/cache/VX_cache_miss_resrv.v
vendored
19
hw/rtl/cache/VX_cache_miss_resrv.v
vendored
@@ -1,6 +1,8 @@
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`include "VX_cache_config.vh"
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module VX_cache_miss_resrv #(
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parameter CACHE_ID = 0,
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parameter BANK_ID = 0,
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// Size of line inside a bank in bytes
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parameter BANK_LINE_SIZE = 0,
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// Number of banks {1, 2, 4, 8,...}
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@@ -141,4 +143,21 @@ module VX_cache_miss_resrv #(
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end
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end
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`ifdef DBG_PRINT_CACHE_MSRQ
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always_ff @(posedge clk) begin
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if (mrvq_push || mrvq_pop) begin
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$write("%t: bank%02d:%01d msrq: push=%b pop=%b", $time, CACHE_ID, BANK_ID, mrvq_push, mrvq_pop);
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for (int i = 0; i < MRVQ_SIZE; i++) begin
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if (valid_table[i]) begin
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$write(" ");
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if (i == head_ptr) $write("*");
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if (~ready_table[i]) $write("!");
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$write("addr%0d=%0h", i, `LINE_TO_BYTE_ADDR(addr_table[i], BANK_ID));
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end
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end
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$write("\n");
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end
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end
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`endif
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endmodule
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