pipeline optimization: fixed GPR fanout delay to execute units

hw/rtl/interfaces/VX_csr_to_fpu_if.v

@@ -1,5 +1,5 @@
-`ifndef VX_CSR_TO_ISSUE_IF
-`define VX_CSR_TO_ISSUE_IF
+`ifndef VX_CSR_TO_FPU_IF
+`define VX_CSR_TO_FPU_IF
 
 `include "VX_define.vh"
 
@@ -7,7 +7,7 @@
     `IGNORE_WARNINGS_BEGIN
 `endif
 
-interface VX_csr_to_issue_if ();
+interface VX_csr_to_fpu_if ();
 
 	wire [`NW_BITS-1:0]  wid;
 	wire [`FRM_BITS-1:0] frm;

hw/rtl/interfaces/VX_fpu_req_if.v

@@ -15,7 +15,7 @@ interface VX_fpu_req_if ();
     wire [`NUM_THREADS-1:0] tmask;
     wire [31:0]             PC;
     wire [`FPU_BITS-1:0]    op_type;
-    wire [`FRM_BITS-1:0]    frm;
+    wire [`MOD_BITS-1:0]    op_mod;
     wire [`NUM_THREADS-1:0][31:0] rs1_data;
     wire [`NUM_THREADS-1:0][31:0] rs2_data;
     wire [`NUM_THREADS-1:0][31:0] rs3_data;