non-cacheable memory address critical paths optimizations

2021-06-10 12:47:18 -07:00
parent 41069ba188
commit adf033b0aa
11 changed files with 258 additions and 194 deletions
--- a/hw/rtl/libs/VX_priority_encoder.v
+++ b/hw/rtl/libs/VX_priority_encoder.v
@@ -18,6 +18,12 @@ module VX_priority_encoder #(
        assign index     = 0;
        assign valid_out = data_in;

+    end else if (N == 2) begin
+
+        assign onehot    = {!data_in[REVERSE], data_in[REVERSE]};
+        assign index     = !data_in[REVERSE];
+        assign valid_out = (| data_in);
+
    end else if (FAST) begin

        wire [N-1:0] scan_lo;