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reset networks optimization

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This commit is contained in:
Blaise Tine
2020-11-16 01:12:02 -08:00
parent 1bc4b8e7a8
commit a1fcdd467a
14 changed files with 259 additions and 219 deletions
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10
hw/rtl/cache/VX_cache_miss_resrv.v vendored
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@@ -123,8 +123,7 @@ module VX_cache_miss_resrv #(
head_ptr <= 0;
tail_ptr <= 0;
size <= 0;
end else begin
end else begin
if (update_ready_st0) begin
ready_table <= ready_table | valid_address_match;
end
@@ -140,7 +139,6 @@ module VX_cache_miss_resrv #(
end else begin
valid_table[tail_ptr] <= 1;
ready_table[tail_ptr] <= enqueue_ready_st3;
addr_table[tail_ptr] <= enqueue_addr_st3;
tail_ptr <= tail_ptr + $bits(tail_ptr)'(1);
size <= size + $bits(size)'(1);
end
@@ -159,6 +157,12 @@ module VX_cache_miss_resrv #(
end
end
always @(posedge clk) begin
if (enqueue_st3 && !enqueue_msrq_st3) begin
addr_table[tail_ptr] <= enqueue_addr_st3;
end
end
VX_dp_ram #(
.DATAW(`MRVQ_METADATA_WIDTH),
.SIZE(MRVQ_SIZE),