rtl cache refactory
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@@ -3,11 +3,13 @@
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`include "../cache/VX_cache_config.vh"
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interface VX_cache_snp_req_if ();
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interface VX_cache_snp_req_if #(
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parameter DRAM_ADDR_WIDTH = 1
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) ();
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wire snp_req_valid;
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wire [31:0] snp_req_addr;
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wire snp_req_ready;
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wire snp_req_valid;
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wire [DRAM_ADDR_WIDTH-1:0] snp_req_addr;
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wire snp_req_ready;
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endinterface
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